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企業・研究機関Company / Institute · アメリカUSA · 2022–2026 LIVE

Ayar Labs (United States)

アメリカUSA 15位 (9 pt) · 世界World 28位 (0 pt) · 対象論文Papers 7

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0122022 VLSI: 12022 JSSC: 1220222023 JSSC: 1120232024 VLSI: 12024 JSSC: 1220242025 A-SSCC: 2220252026
VLSIJSSCA-SSCC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
VLSI1–1––
JSSC111––
A-SSCC–––2–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1000.00–
VLSI Tier 1211.51アメリカUSA #11 · 世界World #28
JSSC Tier 1300.21アメリカUSA #14 · 世界World #47
CICC Tier 2000.00–
A-SSCC Tier 2200.54アメリカUSA #2 · 世界World #11
ESSERC Tier 2000.00–

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. A-SSCC
    2025
    A 22Gb/s-54Gb/s Reconfigurable PAM-2/4/8 DSP-based Transmitter with 14-tap Feedforward Equalization
    DOI
    Seung-Mo Jin, Dong-Ho Kim, Kwang-Ho Lee, Haram Ju, Gyu-Seob Jeong, Woorham Bae, Jaeduk Han, Min-Seong Choo
    Hanyang University · Korea Electronics Technology Institute · Ayar Labs (United States)
  2. A-SSCC
    2025
    Critical-Timing-Relaxed pre-Decision Feedforward Equalizer for High-Speed DSP-based Wireline Receiver using Hardware-in-the-Loop Verification on RF-SoC
    DOI
    Sang-Hyeon Ok, Jae-Geon Lee, Kwang-Ho Lee, Haram Ju, Gyu-Seob Jeong, Woorham Bae, Min-Seong Choo
    Hanyang University · Korea Electronics Technology Institute · Ayar Labs (United States)
  3. JSSC
    2024
    Monolithic Electronic–Biophotonic System-on-Chip for Label-Free Real-Time Molecular Sensing
    DOI
    Christos Adamopoulos, Hyeong-Seok Oh, Sidney Buchbinder, Panagiotis Zarkos, Pavan Bhargava, Asmaysinh Gharia, Ali M. Niknejad, Mekhail Anwar, Vladimir Stojanović
    Bosch · University of California, Berkeley · Ayar Labs (United States) · Lawrence Berkeley National Laboratory · University of California, San Francisco · University of Cambridge
  4. VLSI
    2024
    A 256Gbps Microring-Based WDM Transceiver with Error-Free Wide Temperature Operation for Co-Packaged Optical I/O Chiplets
    DOI
    Pavan Bhargava, Daniel Jeong, Eric Jan, Derek Van Orden, Derek Kita, Hayk Gevorgyan, Sidney Buchbinder, Anatoly Khilo, Woorham Bae, Sung-Jin Kim, John Fini, Norman Chan, Chen Sun
    Ayar Labs (United States)
  5. JSSC
    2023
    Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Applications in a Zero-Change 45-nm CMOS-SOI Process
    DOI
    Panagiotis Zarkos, Sidney Buchbinder, Christos Adamopoulos, Sarika Madhvapathy, Olivia Hsu, Jake Whinnery, Pavan Bhargava, Vladimir Stojanović
    Lawrence Berkeley National Laboratory · University of California, Berkeley · Ayar Labs (United States) · Stanford University
  6. JSSC
    2022
    An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET
    DOI
    Colin Schmidt, John Wright, Zhongkai Wang, Eric Chang, Albert Ou, Woorham Bae, Sean Huang, Vladimir Milovanovic, Anita Flynn, Brian Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic
    University of California, Berkeley · Amazon · Ayar Labs (United States) · University of Kragujevac
  7. VLSI
    2022
    5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O
    DOI
    Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O’Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Chris Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade
    Intel · Ayar Labs (United States)