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VLSI · 2022–2026 LIVE

Delft University of Technology

対象論文Papers 23 · 筆頭著者first author 17 · 著者按分fractional 15.19 · 世界World #5

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Sijun Du ORCID5
2Kofi Makinwa4
3Fabio Sebastiano ORCID3
3Masoud Babaie ORCID3
5Dante G. Muratore ORCID2
5Huajun Zhang ORCID2
5Kofi A. A. Makinwa ORCID2
5Lucien Breems2
5Muhammed Bolatkale ORCID2
5Qinwen Fan ORCID2
5Sundeep Javvaji ORCID2
5Wenyu Peng ORCID2
5Yunzhe Yang ORCID2
14A. C. de Oliveira1
14Aofei Guo1
14Arash Akhoundi ORCID1
14Bagas Prabowo ORCID1
14Beatriz Lafuente Alcazar1
14Chao Chen1
14Dante Muratore1
14Davide Degli Esposti1
14Djalma Simoes dos Santos ORCID1
14E. Aydin1
14E. Noothout1
14Emile Noothout1
14H. Jiang1
14H.J. Vos1
14Hendrik J. Vos ORCID1
14Heng Ma ORCID1
14Hoda Yassin ORCID1
14Ilker Polat1
14Jan A. Angevare ORCID1
14Jiang Gong ORCID1
14Jida Peng1
14Jingchu He1
14Job van Staveren ORCID1
14K. Makinwa1
14K.A.A. Makinwa1
14Kenji Capannelli1
14Lieven M. K. Vandersypen ORCID1
14Luc Enthoven ORCID1
14M.A.P. Pertijs1
14M.D. Verweij1
14Martin D. Verweij ORCID1
14Maximilian Rimbach-Russ1
14Maël Demarets1
14Michiel A. P. Pertijs ORCID1
14Morteza S. Alavi ORCID1
14N. de Jong1
14Nandor G. Toth ORCID1
14Nico de Jong1
14Nuriel N. M. Rozsa ORCID1
14P. Guo1
14Peng Guo ORCID1
14Ramon W.J. Overwater ORCID1
14Robert Bogdan Staszewski ORCID1
14Roger Zamparette ORCID1
14S. Javvaji1
14S. Li1
14Shoubhik Karmakar ORCID1
14Sining Pan ORCID1
14Stefano Reale1
14Taehoon Kim ORCID1
14Teruki Someya ORCID1
14V. Pecanins-Martinez1
14Vincent A. Henneken1
14Vincent Van Hoek1
14Xiao Hu ORCID1
14Xiaohua Huang ORCID1
14Yannick Hopf1
14Z. Tang1
14Z.Y. Chang1
14Zhao Chen1
14Zhong Gao ORCID1
14Zu-Yao Chang1

対象論文Papers

  1. VLSI
    2026
    A 6.78MHz Fully Integrated Dual-Output Symmetric 1/16-Cycle Regulating Rectifier Achieving 92.57% Efficiency and 3.7 V Voltage Difference
    DOI
    Xiaguang Li, Chao Yang, Shiheng Yang, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen
    Fudan University · University of Electronic Science and Technology of China · Delft University of Technology
  2. VLSI
    2026
    A 75nW BJT-Based Temperature Sensor with ±0.1°C Inaccuracy from −40°C to 85°C
    DOI
    Jida Peng, Nandor G. Toth, Kofi A. A. Makinwa
    Delft University of Technology
  3. VLSI
    2026
    A MEMS-Based Throughflow Multimodal Sensor Interface IC for Real-Time Fluid Parameter Monitoring
    DOI
    A. C. de Oliveira, J. Groenesteijn, Z. Tang, H. Jiang, J. Lötters, R. Wiegerink, K. Makinwa
    Delft University of Technology · Bronkhorst (Netherlands) · University of Twente
  4. VLSI
    2026
    Cryo-CMOS Sub-1K 16nm FinFET DAC for Fast Two-Qubit Gates in Spin Qubits
    DOI
    Ilker Polat, Ramon W.J. Overwater, Bagas Prabowo, Stefano Reale, Davide Degli Esposti, Kenji Capannelli, Maximilian Rimbach-Russ, Lieven M.K. Vandersypen, Masoud Babaie, Fabio Sebastiano
    Delft University of Technology
  5. VLSI
    2025
    A -87.2 dB THD+N 89.1 dB DR Fully-Integrated Shunt-Resistor-Based In-Line Current Sensor with up to 2 MHz 14.4 V PWM Rejection
    DOI
    Heng Ma, Huajun Zhang, Marco Berkhout, Qinwen Fan
    Delft University of Technology
  6. VLSI
    2025
    A 4GHz 2b 5th Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW
    DOI
    Sundeep Javvaji, Lucien Breems, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Kofi Makinwa
    Delft University of Technology · NXP
  7. VLSI
    2025
    A Closed-Loop Neuromodulation Chipset with 0.0009\text{mm}^{2}-0.36 \mu \mathrm{W}/\text{Ch}$ Recording Frontend and ${0.075} \mathrm{m m}^{\mathrm{2}}-\mathrm{6.76}{\mu}\mathrm{W}$ Seizure Classification Backend
    DOI
    Xiaohua Huang, Hoda Yassin, Beatriz Lafuente Alcazar, Arash Akhoundi, Dante G. Muratore
    Delft University of Technology
  8. VLSI
    2025
    A Fully Integrated Sc Converter Hybridizing Dickson and Continuously-Scalable-Conversion-Ratio Topologies with a Wide Bipolar Vcr Range for Energy Harvesting
    DOI
    Aofei Guo, Wenyu Peng, Yunzhe Yang, Xiao Hu, Dante Muratore, Sijun Du
    Delft University of Technology
  9. VLSI
    2025
    A Globally Optimized 3-D MPPT System for Dual-Band RF Energy Harvesting with Collaborative Source Reconfiguration
    DOI
    Xiaguang Li, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen
    Fudan University · Delft University of Technology
  10. VLSI
    2025
    Matryoshka CSCR: A Reconfigurable Matryoshka-Stacked Continuous-Scalable-Conversion-Ratio Switched-Capacitor DC-DC Converter with 0.1-to-1.7V Input
    DOI
    Yunzhe Yang, Wenyu Peng, Mo Huang, Sijun Du
    Delft University of Technology · University of Macau
  11. VLSI
    2024
    A 0.8V Capacitively-Biased BJT-Based Temperature Sensor with an Inaccuracy of ±0.4°C ($\mathbf{3}\mathbf{\sigma}$) from −40°C to 125°C in 22nm CMOS
    DOI
    Zhong Tang, Haining Wang, Xiaopeng Yu, Kofi A.A. Makinwa, Nick Nianxiong Tan
    Zhejiang University · Delft University of Technology
  12. VLSI
    2024
    A 0.9V Rail-to-Rail Ultra-Low-Power Fully Integrated Clock Generator Achieving 23fJ/Cycle in 28nm CMOS
    DOI
    Sander Derksen, Maël Demarets, Gerard Villar Piqué, Fabio Sebastiano
    NXP · Delft University of Technology
  13. VLSI
    2024
    A 2000-Volumes/s 3D Ultrasound Imaging Chip with Monolithically-Integrated 11.7×23.4mm2 2048-Element CMUT Array and Arbitrary-Wave TX Beamformer
    DOI
    Nuriel N.M. Rozsa, Zhao Chen, Taehoon Kim, Peng Guo, Yannick Hopf, Jason Voorneveld, Djalma Simoes dos Santos, Emile Noothout, Zu-Yao Chang, Chao Chen, Vincent A. Henneken, Nico de Jong, Hendrik J. VOS, Johan G. Bosch, Martin D. Verweij, Michiel A.P. Pertijs
    Delft University of Technology · Erasmus MC
  14. VLSI
    2024
    A Beyond-the-rail Audio CTΔΣM with a Passive Input Stage and 99.2dB SNDR
    DOI
    S. Li, S. Javvaji, V. Pecanins-Martinez, E. Aydin, R. van Veldhoven, K.A.A. Makinwa
    Delft University of Technology · NXP
  15. VLSI
    2023
    A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
    DOI
    MoonHyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E.J. Chichilnisky, Boris Murmann, Dante G. Muratore
    Stanford University · University of Macau · Yonsei University · Delft University of Technology
  16. VLSI
    2023
    A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW
    DOI
    Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude Essink, Koen Beijens, Kofi Makinwa, Lucien Breems
    Delft University of Technology · NXP
  17. VLSI
    2023
    A 720 nW Current Sensor with 0-to-15 V Input Common-Mode Range and ±0.5% Gain Error from −40 to 85 °C
    DOI
    Roger Zamparette, Kofi Makinwa
    Delft University of Technology
  18. VLSI
    2023
    A Class-D Piezoelectric Speaker Driver Using A Quadrature Feedback Chopping Scheme achieving 29dB Large-Signal THD+N Improvement
    DOI
    Shoubhik Karmakar, Huajun Zhang, Marco Berkhout, Qinwen Fan
    Delft University of Technology
  19. VLSI
    2023
    A Pitch-Matched Transceiver ASIC for 3D Ultrasonography with Micro-Beamforming ADCs based on Passive Boxcar Integration and a Multi-Level Datalink
    DOI
    P. Guo, Z.Y. Chang, E. Noothout, H.J. Vos, J.G. Bosch, N. de Jong, M.D. Verweij, M.A.P. Pertijs
    Delft University of Technology · Erasmus MC
  20. VLSI
    2022
    A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology
    DOI
    Zhongkai Wang, Minsoo Choi, Paul Kwon, Kyoungtae Lee, Bozhi Yin, Zhaokai Liu, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
    University of California, Berkeley · Samsung · University of California, San Francisco · Hanyang University · Delft University of Technology
  21. VLSI
    2022
    A 210nW BJT-based Temperature Sensor with an Inaccuracy of ±0.15°C (3σ) from −15°C to 85°C
    DOI
    Teruki Someya, Vincent Van Hoek, Jan Angevare, Sining Pan, Kofi Makinwa
    Delft University of Technology
  22. VLSI
    2022
    A 3V 15b 157μW Cryo-CMOS DAC for Multiplexed Spin-Qubit Biasing
    DOI
    Luc Enthoven, Job van Staveren, Jiang Gong, Masoud Babaie, Fabio Sebastiano
    Delft University of Technology
  23. VLSI
    2022
    A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation
    DOI
    Zhong Gao, Martin Fritz, Jingchu He, Gerd Spalink, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
    Delft University of Technology · University College Dublin