← Fudan University

VLSI · 2022–2026 LIVE

Fudan University

対象論文Papers 10 · 筆頭著者first author 10 · 著者按分fractional 7.97 · 中国China #3 · 世界World #20

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Jiawei Xu ORCID4
1Zhiliang Hong ORCID4
3Hongtao Xu ORCID2
3Liheng Liu ORCID2
3Qinjing Pan ORCID2
3Tianxiang Qu ORCID2
3Xiaguang Li ORCID2
3Xiaoyang Zeng ORCID2
3Zhiyuan Chen ORCID2
10Bowen Yu ORCID1
10Chao Chen1
10Chao Yang ORCID1
10Hao Xu ORCID1
10Jun Hu1
10Junjie Gu1
10Junyan Bi ORCID1
10Kai Xu ORCID1
10Kaiwen Zhou ORCID1
10Kunpeng Hu1
10Ming Liu ORCID1
10Na Yan ORCID1
10Peng Cao ORCID1
10Qi Liu ORCID1
10Qi Luo1
10Shen Ye ORCID1
10Shi Chen1
10Sicheng Han ORCID1
10Tincheng Ou1
10Wei Li ORCID1
10Wen Zuo ORCID1
10Wenpeng He1
10Yingguo Yang1
10Yizhuo Wang1
10Yubin Li1
10Yue Cao1
10Yun Wang ORCID1
10Yunhao Li ORCID1
10Zhongqiu Shen1
10Zhu Yuan1

対象論文Papers

  1. VLSI
    2026
    A 3D-Conformal Flexible X-Ray Detector with 2.06 pA rms Ultra-Low Noise Readout Circuit Enabling Low-Dose Computed Tomography Imaging
    DOI
    Zhongqiu Shen, Kaiwen Zhou, Shi Chen, Shen Ye, Zhiliang Hong, Yingguo Yang, Jiawei Xu
    Fudan University
  2. VLSI
    2026
    A 6.78MHz Fully Integrated Dual-Output Symmetric 1/16-Cycle Regulating Rectifier Achieving 92.57% Efficiency and 3.7 V Voltage Difference
    DOI
    Xiaguang Li, Chao Yang, Shiheng Yang, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen
    Fudan University · University of Electronic Science and Technology of China · Delft University of Technology
  3. VLSI
    2025
    A 0.06mm2 14.7-to-20.2GHz Quad-Core VCO Enabled by the Folded Circular Transformer Achieving 201.1dBc/Hz FoMT and 203.4dBc/Hz FoMA
    DOI
    Tincheng Ou, Kunpeng Hu, Hao Xu, Junjie Gu, Yizhuo Wang, Junyan Bi, Wenpeng He, Zhiwei Xu, Man-Kay Law, Na Yan
    Fudan University · Zhejiang University · University of Macau
  4. VLSI
    2025
    A 560μW 6fA/√Hz 146dB-DR Ultrasensitive Current Readout Circuit for PWM-Dimming-Tolerant Under-Display Ambient Light Sensor
    DOI
    Liheng Liu, Tianxiang Qu, Qinjing Pan, Dan Li, Gan Guo, Zhiliang Hong, Jiawei Xu
    Fudan University
  5. VLSI
    2025
    A Globally Optimized 3-D MPPT System for Dual-Band RF Energy Harvesting with Collaborative Source Reconfiguration
    DOI
    Xiaguang Li, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen
    Fudan University · Delft University of Technology
  6. VLSI
    2024
    A 140-Gbps 1-to-21-GHz Ultra-Wideband LNA Achieving 1.95-to-3-dB NF Using Gm-Assisted-Feedback Noise Suppression Technique in 40nm Bulk CMOS
    DOI
    Sicheng Han, Yun Wang, Yunhao Li, Wen Zuo, Wei Li, Yue Lin, Hongtao Xu
    Fudan University
  7. VLSI
    2024
    A 67F2 Reconfigurable PUF Using 1T2R RRAM Switching Competition in 28nm CMOS with 5e-9 Bit Error Rate
    DOI
    Yue Cao, Honghu Yang, Jianguo Yang, Qi Liu, Ming Liu
    Fudan University · Shanghai Zhangjiang Laboratory · Zhangjiang Laboratory
  8. VLSI
    2024
    A 71.5-dB SNDR 475-MS/s Ringamp-Based Pipelined SAR ADC with On-Chip Bit-Weight Calibration
    DOI
    Chao Chen, Zhu Yuan, Peng Cao, Jiawei Xu, Zhiliang Hong
    Fudan University
  9. VLSI
    2024
    A 97.3dB SNR Bioimpedance AFE with −84dB THD Segmented-${\Delta\Sigma \mathrm{M}}$ Sinusoidal Current Generator and Passing-Through Instrumentation Amplifier
    DOI
    Qinjing Pan, Qi Luo, Tianxiang Qu, Liheng Liu, Xiao Li, Min Chen, Zhiliang Hong, Jiawei Xu
    Fudan University
  10. VLSI
    2023
    A 50μW Ring-Type Complementary Inverse-Class-D Oscillator with 191.4dBc/Hz FoM and 205.6dBc/Hz FoMA
    DOI
    Kai Xu, Bowen Yu, Jun Hu, Yubin Li, Robert Bogdan Staszewski, Hongtao Xu
    Fudan University · University College Dublin