VLSI · 2022–2026 LIVE

IBM

対象論文Papers 14 · 筆頭著者first author 8 · 著者按分fractional 8.07 · アメリカUSA #2 · 世界World #5

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank	著者Author	論文数Papers
1	Martin Cochet ORCID	5
2	Xin Zhang	4
3	Daniel Friedman	3
3	Michael Beakes	3
3	Mounir Meghelli	3
6	Christian Baks	2
6	John Bulzacchelli	2
6	John F. Bulzacchelli ORCID	2
6	Mehmet Soyuer	2
6	R. Joshi	2
6	Sergey Rylov	2
6	Timothy Dickson	2
6	Troy Beukema	2
6	Zeynep Deniz	2
15	A. Chen	1
15	A. Fasoli	1
15	A. Friz	1
15	Ali Javadi-Abhari	1
15	Ankur Agrawal ORCID	1
15	Antonio Pelella	1
15	B. He	1
15	Bahman Hekmatshoartabari ORCID	1
15	Bodhisatwa Sadhu ORCID	1
15	Brian Gaucher	1
15	Brian Yavoich	1
15	C. Mackin	1
15	Chris Baks	1
15	D. Kannambadi	1
15	D. Leu	1
15	David Frank	1
15	Derek Leu	1
15	Devin Underwood	1
15	Dongho Lee	1
15	E. Kachir	1
15	Fabio Carta	1
15	Genadi Tverskoy	1
15	Geoffrey W. Burr	1
15	Gregory Fredeman	1
15	H. Konen	1
15	H. Tsai	1
15	Herschel Ainspan	1
15	I. Ahsan	1
15	I. Wagner	1
15	Ismael Cervantes	1
15	J. Demarest	1
15	J. Luquin	1
15	J. Timmerwilke	1
15	Jinwook Jung ORCID	1
15	John Davis	1
15	John Timmerwilke	1
15	Jonathan E. Proesel ORCID	1
15	Jonathan Proesel	1
15	K. Reyer	1
15	K. Shimanovich	1
15	K. Tien	1
15	K. W. Brew	1
15	Karthik Swaminathan ORCID	1
15	Kevin Tien	1
15	Kyu-Hyoun Kim ORCID	1
15	Leland Chang	1
15	M. Suleiman	1
15	M. Yeck	1
15	Mark Yeck ORCID	1
15	Monodeep Kar ORCID	1
15	N. Jungmann	1
15	N. Saulnier	1
15	P. Narayanan	1
15	Paul Bunce	1
15	Pradip Bose ORCID	1
15	Rajiv Joshi	1
15	Raphael Robertazzi	1
15	Robert Casatuta	1
15	Russell Hayes	1
15	S. Ambrogio	1
15	S. Chakraborty	1
15	S. Choi	1
15	S. Teehan	1
15	Stanislav Lukashov	1
15	Subhajit Ray ORCID	1
15	T. Cohen	1
15	T. Gordon	1
15	T. M. Levin	1
15	T. Miller	1
15	Timothy O. Dickson ORCID	1
15	Uma Srinivasan	1
15	V. Chan	1
15	V. Narayanan	1
15	V. Sindhe	1
15	Y. Freiman	1
15	Zeynep Toprak-Deniz ORCID	1
15	Zhiying Chen	1

対象論文Papers

VLSI
2026

A 1-to-1050-mA DLDO with Rising-Edge Computational Control and Load-Dependent Feedback Achieving 46-mV/ns DVS Rate and 0.15-Ps FoM
DOI
Yichen Xu, Rentao Wan, Mao Li, Zhaoqing Wang, Suhwan Kim, Ram K. Krihshnamurthy, Xin Zhang, Mingoo Seok

Columbia University · Intel · IBM
VLSI
2026

Detecting Quantum Errors with Hardware-Efficient Checks
DOI
Simon Martiel, Ali Javadi-Abhari

IBM · IBM
VLSI
2026

VSIMO: A DC-DC SIMO-based Current Mismatch Compensator Supporting Per-Output Bidirectional Power Flow for Stacked Voltage Domains Achieving >82% System Efficiency under up to 360-mA Load Mismatch
DOI
Yichen Xu, Shahreer Ahmed Al Hossain, Baoqi Zhu, Suhwan Kim, Ram K. Krihshnamurthy, Xin Zhang, Mingoo Seok

Columbia University · Intel · IBM
VLSI
2025

A 5.6-100K, 128ppm/K Cryo-CMOS Current Reference
DOI
Subhajit Ray, David Frank, John Bulzacchelli, Bodhisatwa Sadhu, Kevin Tien, Mark Yeck, Stanislav Lukashov, Chris Baks, John Timmerwilke, Raphael Robertazzi, Devin Underwood, Brian Gaucher, Daniel Friedman

IBM
VLSI
2025

A 6+ Ghz 128 Kb Multi-Port L1 Cache Using Ground Rule Clean 10T Bitcells in 5Nm Technology
DOI
Rajiv Joshi, John Davis, Gregory Fredeman, Brian Yavoich, Uma Srinivasan, Russell Hayes, Antonio Pelella, Zhiying Chen, Paul Bunce, Dongho Lee, Ismael Cervantes, Genadi Tverskoy, Derek Leu, Juergen Pille, Bill Huott, Steve Kim

IBM · IBM
VLSI
2024

A 0.88pJ/bit 112Gb/s PAM4 Transmitter with $1\mathrm{V}_{\text{ppd}}$ Output Swing and 5-Tap Analog FFE in 7nm FinFET CMOS
DOI
Zeynep Toprak-Deniz, Timothy O. Dickson, Martin Cochet, Jonathan Proesel, John F. Bulzacchelli, Herschel Ainspan, Matthias Brändli, Thomas Morf, Michael Beakes, Mounir Meghelli

IBM · IBM
VLSI
2024

A 400-ns-Settling- Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology
DOI
Erik Loscalzo, Martin Cochet, Joseph Zuckerman, Samira Zalias, Michael Lekas, Stephen Cahill, Tianyu Jia, Karthik Swaminathan, Maico Cassel dos Santos, Davide Giri, Hesam Sadeghi, Joseph Meyer, Noah Sturcken, David Brooks, Gu-Yeon Wei, Luca Carloni, Pradip Bose, Kenneth Shepard

Columbia University · IBM · Ferric (United States) · Harvard University
VLSI
2023

A 1.9GHz 0.57V Vmin 576Kb embedded product-ready L2 cache in 5nm FinFET technology
DOI
N. Jungmann, R. Joshi, E. Kachir, K. Shimanovich, B. He, T. Cohen, T. Miller, D. Leu, D. Kannambadi, I. Wagner, K. Reyer, H. Konen, M. Suleiman, V. Sindhe, Y. Freiman

IBM
VLSI
2023

A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS
DOI
Ankur Agrawal, Monodeep Kar, Kyu-Hyoun Kim, Sergey Rylov, Jinwook Jung, Seiji Munetoh, Kohji Ho-Sokawa, Xin Zhang, Bahman Hekmatshoartabari, Fabio Carta, Martin Cochet, Robert Casatuta, Mingu Kang, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang

IBM · IBM（日本拠点）IBM Japan · University of California San Diego
VLSI
2023

Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited)
DOI
Geoffrey W. Burr, P. Narayanan, S. Ambrogio, A. Okazaki, H. Tsai, K. Hosokawa, C. Mackin, A. Nomura, T. Yasuda, J. Demarest, K. W. Brew, V. Chan, S. Choi, T. Gordon, T. M. Levin, A. Friz, M. Ishii, Y. Kohda, A. Chen, A. Fasoli, J. Luquin, N. Saulnier, S. Teehan, I. Ahsan, V. Narayanan

IBM · IBM（日本拠点）IBM Japan
VLSI
2022

A 0.31V Vmin Cryogenic SRAM in 14 nm FinFET for Quantum Computing
DOI
R. Joshi, J. Timmerwilke, K. Tien, M. Yeck, S. Chakraborty

IBM
VLSI
2022

A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links
DOI
Timothy Dickson, Zeynep Deniz, Martin Cochet, Marcel Kossel, Thomas Morf, Young-Ho Choi, Pier Andrea Francese, Matthias Brandli, Troy Beukema, Christian Baks, Jonathan Proesel, John Bulzacchelli, Michael Beakes, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin

IBM · IBM · Samsung
VLSI
2022

A 90.4% Peak Efficiency 48V/1V Three-Level Hybrid Dickson Converter with Gradient Descent Run-Time Optimizer and GaN/Si Hybrid Conversion
DOI
Minxiang Gong, Xin Zhang, Arijit Raychowdhury

Georgia Institute of Technology · IBM
VLSI
2022

An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
DOI
A. Serdar Yonar, Pier Andrea Francese, Matthias Brandli, Marcel Kossel, Thomas Morf, Jonathan E. Proesel, Sergey Rylov, Herschel Ainspan, Martin Cochet, Zeynep Deniz, Timothy Dickson, Troy Beukema, Christian Baks, Michael Beakes, John F. Bulzacchelli, Young-Ho Choi, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin

ETH Zurich · IBM · IBM · Samsung