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企業・研究機関Company / Institute · アメリカUSA · 2022–2026 LIVE

Intel

アメリカUSA 1位 (112.5 pt) · 世界World 2位 (69.5 pt) · 対象論文Papers 176

年別の推移Papers per year

会議・論文誌別の論文数(フルカウント)Papers per venue (full count)

01020304050602022 ISSCC: 162022 VLSI: 122022 JSSC: 152022 CICC: 52022 A-SSCC: 32022 ESSERC: 35420222023 ISSCC: 52023 VLSI: 52023 JSSC: 132023 CICC: 52023 ESSERC: 33120232024 ISSCC: 102024 VLSI: 92024 JSSC: 122024 CICC: 23320242025 ISSCC: 92025 VLSI: 52025 JSSC: 72025 CICC: 52025 ESSERC: 12720252026 ISSCC: 72026 VLSI: 62026 JSSC: 142026 CICC: 4312026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC1651097
VLSI125956
JSSC151312714
CICC55254
A-SSCC3––––
ESSERC33–1–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1473032.39アメリカUSA #1 · 世界World #2
VLSI Tier 1373031.16アメリカUSA #1 · 世界World #2
JSSC Tier 1613839.94アメリカUSA #1 · 世界World #2
CICC Tier 2211414.61アメリカUSA #1 · 世界World #1
A-SSCC Tier 2322.10アメリカUSA #1 · 世界World #7
ESSERC Tier 2734.42アメリカUSA #1 · 世界World #11

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    50-GBaud+ VCSEL-Based Co-Packaged Optical Links: An Overview of Circuits and Systems
    DOI
    Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Shuhei Yamada, Zhen Zhou, Joe Kennedy, James Jaussi, Mozhgan Mansuri
    Intel
  2. CICC
    2026
    A 32Gb/s/lane 0.83Tb/s/mm UCIe Compliant Die-to-Die Link Over 25mm Standard Package
    DOI
    Zhaokai Liu, Susnata Mondal, Yuanming Zhu, Sashank Krishnamurthy, Shuhei Yamada, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James Jaussi, Mozhgan Mansuri
    Intel · NVIDIA · University of California, Santa Cruz
  3. CICC
    2026
    A Fully Integrated Gate-All-Around Ribbon FET Based Dual-Loop 1 GHz Switched-Capacitor Voltage Regulator with Anti-Leakage, Adaptive Dead Time and Self-Discharge Features
    DOI
    Arvind Raghavan, Sivaraman Masilamani, Keng Chen, Huanhuan Zhang, Tamir Salus, Rachid Rayess
    Intel · Intel
  4. CICC
    2026
    PersASR: A 2.3-μJ/frame 96.8%-accurate TinyML Automatic Speech Recognition Processor with Data Augmentation-Driven Personalization in 16-nm FinFET
    DOI
    Seunghyun Moon, Jinho Park, Chuan-Tung Lin, SeongHwan Cho, Gregory Chen, Phil Knag, Ram Krishnamurthy, Mingoo Seok
    Columbia University · Korea Advanced Institute of Science and Technology · Intel
  5. ISSCC
    2026
    10.6 A Hybrid-Bonded 12.1Tops/mm 2 5 6-Core DNN Processor with 2.5Tb/s/mm 2 3D Network on Chip
    DOI
    Phil C. Knag, Gregory K. Chen, Shanshan Xie, Satish Yada, Wei Wu, Yu-Shiang Lin, Alexander Kashirin, Xiemei Meng, Russell Criss, Ana Sonia Leon, Carlos Tokunaga, Ram K. Krishnamurthy, James W. Tschanz
    Intel
  6. ISSCC
    2026
    30.9 A 147TOPS/W, 250TOPS/mm 2 , Fully Synthesizable, Digital Compute-in-Memory Accelerator Supporting INT8×INT8 with Zero-Point Quantization in Intel 18A Technology
    DOI
    Amit Agarwal, Steven K. Hsu, Mark A. Anders, Arnab Raha, Deepak A. Mathaikutty, Ram Krishnamurthy
    Intel
  7. ISSCC
    2026
    A 234-to-252GHz Dual-Polarized Transceiver Using Antenna-in-Package Technologies for Cross-Polarimetric Sensing
    DOI
    Xibi Chen, Georgios C. Dogiamis, Ruonan Han
    Massachusetts Institute of Technology · Intel
  8. ISSCC
    2026
    A 48Gb/s/lane 1.24Tb/s/mm UCIe-Compliant Die-to-Die Link Over 30mm Standard Package
    DOI
    Susnata Mondal, Sashank Krishnamurthy, Shuhei Yamada, Zhaokai Liu, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James Jaussi, Mozhgan Mansuri
    Intel · University of California, Santa Cruz
  9. ISSCC
    2026
    HERACLES: 8192-Way SIMD Programmable Scalable Fully-Homomorphic Encryption SoC for Privacy-Preserving Cloud Computing in Intel 3 CMOS
    DOI
    Anupam Golder, Raghavan Kumar, Sachin Taneja, Kylan Race, Paolo Aseron, James Greensky, Wen Wang, Huijing Gong, Lalith Kethareswaran, Vikram Suresh, Adish Vartak, AppaRao Challagundla, Jeremy Casas, Poornima Lalwaney, Duhyeong Kim, Christopher N. Gutierrez, Ernesto Zamora Ramos, Wonhee Cho, Jose M. Rojas Chaves, Michael Steiner, Dan Lake, Nataraj Yennampelli, Karthik Nivarthi, Kamalakanth Bijinapally, Bala Prasad Talamala, Sravanth Valluri, Vasantha Srirambhatla, Chris Wilkerson, Rosario Cammarota, Sanu Mathew
    Intel · Intel
  10. ISSCC
    2026
    Proactive Power Management-Based Supply Regulation with Online Learning for Variation-Tolerant Workload-Aware Droop Mitigation in 28nm CMOS
    DOI
    Xi Chen, Andrew Liss, William Covington, Qiankai Cao, Yiqi Li, Kang Wei, Raveesh Magod, Muhammad Khellah, Xin Zhang, Jie Gu
    Northwestern University · Texas Instruments · Indian Institute of Technology Madras · Intel · IBM
  11. ISSCC
    2026
    TinyPAD: A 166μm 2 /Lane Variation-Tolerant Probing-Attack Detector for an 8Gb/s/Lane Chip-to-Chip Interface in 16nm FinFET
    DOI
    Mao Li, Rentao Wan, Sanu K Mathew, Vivek De, Mingoo Seok
    Columbia University · Intel
  12. JSSC
    2026
    0.021-μm 2 High-Density SRAM in Intel 18A RibbonFET Technology With PowerVia Backside Power Delivery
    DOI
    Xiaofei Wang, Gwang Hyeon Baek, Kunal Girish Bannore, Kaushal Pareshbhai Dave, Arash Joushaghani, Narae Kang, Minwoo Ko, Anandkumar Mahadevan Pillai, Hema Chandra Prakash Movva, Gyusung Park, Seenivasan Subramaniam, Vinay Vashishtha, Teng Yang, Zheng Guo, Fatih Hamzaoglu, Eric A. Karl
    Intel
  13. JSSC
    2026
    A 108 Gb/s PAM-4 VCSEL-Based Direct-Drive Optical Engine for Co-Packaged Optics Applications
    DOI
    Susnata Mondal, Sashank Krishnamurthy, Junyi Qiu, Tolga Acikalin, Soumya Bose, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  14. JSSC
    2026
    A 32-Channel 85.4 dB SNDR Time-Multiplexed Neural Recording Front-End Achieving Within-Conversion Artifact Recovery
    DOI
    Arindam Mandal, Chi-Hsiang Huang, Julian Arenas, Wei-En Lee, Kevin D. Patino-Sosa, Philip Anschutz, Amanda Jacob, Keshav Ramachandra, Samuel Sober, Muhannad S. Bakir, Shaolan Li, Visvesh S. Sathe
    NVIDIA · Intel · Georgia Institute of Technology · Emory University
  15. JSSC
    2026
    A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination
    DOI
    Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joseph Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  16. JSSC
    2026
    A 4-Ch × 64 Gb/s/Ch NRZ VCSEL-Based Co-Packaged Fiber-Terminated Optical TX and 80-Gb/s Optical Driver
    DOI
    Susnata Mondal, Junyi Qiu, Sashank Krishnamurthy, Joseph Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  17. JSSC
    2026
    A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd -Temperature Sensor for SoC Thermal Management
    DOI
    Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh S. Sathe
    Georgia Institute of Technology · Intel
  18. JSSC
    2026
    A Hybrid-Bonded 12.1 TOPS/mm 2 56-Core DNN Processor With 2.5 Tb/s/mm 2 3D Network on Chip in Intel 18A and Intel 3
    DOI
    Phil C. Knag, Gregory K. Chen, Shanshan Xie, Satish Yada, Wei Wu, Yu-Shiang Lin, Alexander Kashirin, Xiemei Meng, Russell Criss, Ana Sonia Leon, Carlos Tokunaga, Ram K. Krishnamurthy, James W. Tschanz
    Intel
  19. JSSC
    2026
    A Standardized 20-Tb/s Bandwidth Scalable Heterogeneous 2.5-D System Supporting Assembly Time Workload-Dependent Chiplet Configurations
    DOI
    Srivatsa Rangachar Srinivasa, Dileep J. Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Daniel Lake, Mikhail Moiseev, Robert Munoz, Anuradha Srinivasan, Tanay Karnik
    Intel
  20. JSSC
    2026
    Design Techniques for 48/56 Gb/s/Lane UCIe-S D2D and 45 Gb/s/Lane UCIe-Like Off-Package Links
    DOI
    Susnata Mondal, Sashank Krishnamurthy, Shuhei Yamada, Zhaokai Liu, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James Jaussi, Mozhgan Mansuri
    Intel
  21. JSSC
    2026
    GUARD: A Clock and Voltage Glitch Detector With On-Demand Protection
    DOI
    Mao Li, Sanu K. Mathew, Vivek De, Mingoo Seok
    Columbia University · Intel
  22. JSSC
    2026
    HERACLES: 8192-Way SIMD-Programmable Scalable Fully Homomorphic Encryption SoC
    DOI
    Raghavan Kumar, Sachin Taneja, Anupam Golder, Kylan Race, Paolo A. Aseron, James Greensky, Dan Lake, Wonhee Cho, Jose M. Rojas Chaves, Sanu K. Mathew
    Intel
  23. JSSC
    2026
    Modern Wireline Transceivers
    DOI
    Tony Chan Carusone, Timothy O. Dickson, Samuel Palermo, Sudip Shekhar, Mozhgan Mansuri
    IBM · Texas A&M University · University of British Columbia · Intel
  24. JSSC
    2026
    Side-Channel Attack-Resistant HMAC-SHA256 Accelerator With Boolean and Arithmetic Masking in Intel 4 CMOS
    DOI
    Sachin Taneja, Vikram B. Suresh, Raghavan Kumar, Vivek De, Sanu K. Mathew
    Intel
  25. JSSC
    2026
    T-REX: Hardware–Software Co-Optimized Transformer Accelerator With Reduced External Memory Access and Enhanced Hardware Utilization
    DOI
    Seunghyun Moon, Mao Li, Gregory K. Chen, Phil C. Knag, Ram K. Krishnamurthy, Mingoo Seok
    Konkuk University · Columbia University · Intel
  26. VLSI
    2026
    A 1-to-1050-mA DLDO with Rising-Edge Computational Control and Load-Dependent Feedback Achieving 46-mV/ns DVS Rate and 0.15-Ps FoM
    DOI
    Yichen Xu, Rentao Wan, Mao Li, Zhaoqing Wang, Suhwan Kim, Ram K. Krihshnamurthy, Xin Zhang, Mingoo Seok
    Columbia University · Intel · IBM
  27. VLSI
    2026
    A 4.8 V 16nm Stackable Hybrid Fully Integrated Voltage Regulator with in-Package Magnetic Inductors Featuring Automatic Voltage and Current Sharing Between Stacks
    DOI
    Jingshu Yu, Suhwan Kim, Harish K Krishnamurthy, Minxiang Gong, Zakir K Ahmed, Sheldon Weng, Krishnan Ravichandran, James W Tschanz, Vivek De
    Intel
  28. VLSI
    2026
    A Monolithic 20W/$\text{mm}^{2}$ 4.8V Input 94.8% Peak Efficiency 2-1 Switched Capacitor Voltage Regulator as First-Stage Current Multiplier for Vertical Power Delivery
    DOI
    Minxiang Gong, Nicolas Butzen, Jingshu Yu, Harish Krishnamurthy, Sheldon Weng, Krishnan Ravichandran, Christopher Pelto, Ramiz Ahan, James Waldemer, James Tschanz
    Intel
  29. VLSI
    2026
    An 800 Gbps/Fiber Silicon Photonic Microring-Based DWDM Transceiver in an Open-Cavity Package
    DOI
    Cooper S. Levy, Jahnavi Sharma, Zhe Xuan, Duanni Huang, Junyi Gao, Songtao Liu, Xinru Wu, Xiaoxi Wang, Susnata Mondal, Sashank Krishnamurthy, Dan Lake, James E. Jaussi
    Intel
  30. VLSI
    2026
    Unified Digital Thermal-Voltage Sensor for Thermal Management in Intel 18A/Intel 3
    DOI
    Shanshan Xie, Gregory K. Chen, Phil C. Knag, Hikmet Seha Ozturk, Visvesh S. Sathe, Carlos Tokunaga, James W. Tschanz
    Intel · Georgia Institute of Technology
  31. VLSI
    2026
    VSIMO: A DC-DC SIMO-based Current Mismatch Compensator Supporting Per-Output Bidirectional Power Flow for Stacked Voltage Domains Achieving >82% System Efficiency under up to 360-mA Load Mismatch
    DOI
    Yichen Xu, Shahreer Ahmed Al Hossain, Baoqi Zhu, Suhwan Kim, Ram K. Krihshnamurthy, Xin Zhang, Mingoo Seok
    Columbia University · Intel · IBM
  32. CICC
    2025
    16 Arrays of 32 All-to-All Coupled CMOS Oscillators for AI Inference and Combinatorial Optimization
    DOI
    Hai Li, James Ayers, Anni Lu, You Li, Dmitri Nikonov, Yongping Fan, Ian Young
    Intel
  33. CICC
    2025
    A 2455μm2 1.7Gbps Side-Channel Attack-Resistant Masked HMAC-SHA256 Accelerator in Intel 4 CMOS
    DOI
    Sachin Taneja, Vikram Suresh, Raghavan Kumar, Vivek De, Sanu Mathew
    Intel
  34. CICC
    2025
    A 68 TOPS/W, 256MB SRAM Sparse GEMM Accelerator Tiled Across 16, 4nm Near Memory Compute (NMC) Chiplets Disaggregated 2.5D System
    DOI
    Srivatsa Rangachar Srinivasa, Prerna Budhkar, Gauthaman Murali, Vui Seng Chua, Paolo Aseron, Vinayak Honkote, Ravi Iyer, Nilesh Jain, Dileep John Kurian, Anuradha Srinivasan, Tanay Karnik
    Intel
  35. CICC
    2025
    A 93.9% Peak Efficiency 3V-to-40V-Input GaN-based DC-DC Converter with Unified Reliability and Efficiency Adaptive Control
    DOI
    Zhaoqing Wang, Yichen Xu, Suhwan Kim, Nachiket Desai, Minxiang Gong, Ram Krishnamuthy, Xin Zhang, Mingoo Seok
    Columbia University · Intel
  36. CICC
    2025
    A High-Performance Passive Base System for Distributed AI/Media Acceleration
    DOI
    Ragh Kuttappa, Jainaveen Sundaram, Srivatsa R Srinivasa, Paolo Aseron, Gauthaman Murali, Vinayak Honkote, Prerna Budhkar, Dileep Kurian, Ronald Kalim, Thomas P Thomas, Anu Srinivasan, Tanay Karnik
    Intel
  37. ESSERC
    2025
    A 0.193A/mm 3 89.8% 24V-1V Dual-path Hybrid Dickson Converter with Fully Integrated Dynamic Charge Transfer Bootstrapped Gate Drivers
    DOI
    Hua Chen, Young-Seok Noh, Minxiang Gong, Arijit Raychowdhury
    Georgia Institute of Technology · Intel
  38. ISSCC
    2025
    1.1 AI Era Innovation Matrix
    DOI
    Navid Shahriari
    Intel
  39. ISSCC
    2025
    2.3 Granite Rapids-D: Intel Xeon 6 SoC for vRAN, Edge, Networking, and Storage
    DOI
    Raj R. Varada, Rohini Krishnan, Ajith Subramonia, Rathish Chandran, Kalyana Chakravarthy, Uttpal D. Desai, Sumedha Limaye, Puneesh Puri, David R. Mulvihill, Mike Bichan, Martin Koolhaas, Vijayalakshmi Ramachandran, Srinivasu Kendle
    Intel · Intel
  40. ISSCC
    2025
    21.5 A Fully Integrated Multi-Phase Voltage Regulator with Enhanced Light-Load-Efficiency Peak of 86%, Featuring an Autonomous Mode Transition from Hard-Switching to Soft-Switching to Discontinuous Conduction Mode in 3nm FinFET CMOS
    DOI
    Kishan Joshi, Avinash Shreepathi Bhat, Christopher Schaef, Keng Chen, Edward Lee, Yura Kocharyan, Ajay Janardanan, Dinesh Ganta, Huanhuan Zhang, Maximilian Geppert, Prescott Mclaughlin, Arvind Raghavan, Sivaraman Masilamani, Syed Askari, Kelly Livingston
    Intel
  41. ISSCC
    2025
    29.2 A $\boldsymbol{0.021}\boldsymbol{\mu}\mathbf{m^{2}}$ High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery
    DOI
    Xiaofei Wang, Yusung Kim, Gwang Hyeon Baek, Kunal Girish Bannore, Kaushal Dave, Arash Joushaghani, Narae Kang, Minwoo Ko, Anandkumar Mahadevan Pillai, Hema Chandra Prakash Movva, Gyusung Park, Muktadir Rahman, Seenivasan Subramaniam, Vinay Vashishtha, Teng Yang, Zheng Guo, Eric A Karl
    Intel
  42. ISSCC
    2025
    8.7 A Dual VDD-Temperature Sensor Employing Sensor Fusion with 2.4°C, 9mV (±3σ) Inaccuracy in 65nm CMOS
    DOI
    Hikmet Seha Ozturk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh Sathe
    Georgia Institute of Technology · Intel
  43. ISSCC
    2025
    8.8 Fine-Grained Spatial and Temporal Thermal Profiling of a 16nm CMOS Buck Converter and SoC Load-Current Emulator Using Low-Voltage Micron-Scale Thermal Sensors
    DOI
    Zakir Ahmed, Suhwan Kim, Charles Augustine, Harish K. Krishnamurthy, Krishnan Ravichandran, James W. Tschanz, Vivek De
    Intel
  44. ISSCC
    2025
    A 0.9pJ/b 108Gb/s PAM-4 VCSEL-Based Direct-Drive Optical Engine
    DOI
    Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Tolga Acikalin, Soumya Bose, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  45. ISSCC
    2025
    A 300MB SRAM, 20Tb/s Bandwidth Scalable Heterogenous 2.5D System Inferencing Simultaneous Streams Across 20 Chiplets with Workload-Dependent Configurations
    DOI
    Srivatsa Rangachar Srinivasa, Dileep Kurian, Paolo Aseron, Prerna Budhkar, Arun Radhakrishnan, Alejandro Cardenas Lopez, Jainaveen Sundaram, Vinayak Honkote, Leonid Azarenkov, Daniel Lake, Jaykant Timbadiya, Mikhail Moiseev, Brando Perez Esparza, Ronald Kalim, Erika Ramirez Lozano, Mukesh Bhartiya, Sriram Kabisthalam Muthukumar, Satish Yada, Suresh Kadavakollu, Saransh Chhabra, Kamakhya Prasad Sahu, James Greensky, Xavier Brun, Esdras Juarez Hernandez, Robert Munoz, Thomas Thomas, Shawna Liff, Vivek De, Anuradha Srinivasan, Tanay Karnik
    Intel · Intel
  46. ISSCC
    2025
    T-REX: A 68-to-567μs/Token 0.41-to-3.95μJ/Token Transformer Accelerator with Reduced External Memory Access and Enhanced Hardware Utilization in 16nm FinFET
    DOI
    Seunghyun Moon, Mao Li, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok
    Columbia University · Intel
  47. JSSC
    2025
    A 0.92-pJ/b PAM-4 and 0.61-pJ/b PAM-6 224-Gb/s DAC-Based Transmitter in 3-nm FinFET
    DOI
    Marco Cusmai, Noam Familia, Elad Kuperberg, Mohammad Nashash, Dovid Gottesman, Zvi Marcus, Yeshayahu Horwitz, Sagi Zalcman, Jihwan Kim, Sandipan Kundu, Ilia Radashkevich, Yoav Segal, Dror Lazar, Udi Virobnik, Peng Li, Ariel Cohen
    Cisco Systems (Israel) · Intel
  48. JSSC
    2025
    A 4.7-to-5.3-Gb/s Fault-Injection and Side-Channel Attack-Resistant AES-256 Engine Using Masked Isomorphic Composite Fields in Intel 4 CMOS
    DOI
    Raghavan Kumar, Sachin Taneja, Vivek De, Sanu K. Mathew
    Intel
  49. JSSC
    2025
    A 65-nm Proactive Power Management Technique With Real-Time Machine Learning Engine for Droop Prediction and Mitigation on Microprocessors
    DOI
    Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket Desai, Jie Gu
    Northwestern University · IBM · Texas Instruments · Intel
  50. JSSC
    2025
    A 7-bit 1.75-GS/s 6.9-fJ/conv.-step FoMw Loop-Unrolled Fully Asynchronous SAR ADC in 3-nm CMOS for a 224-Gb/s SerDes Receiver
    DOI
    Chakravarti Bheemisetti, Karunanidhan Pandey, Idan Lotan, Gadi Ori, Ahmad Khairi, Yoel Krupnik, Udi Virobnik, Boyapati Subrahmanyam, Ariel Cohen, Nagendra Krishnapura
    Intel · Intel · Intel · Indian Institute of Technology Madras
  51. JSSC
    2025
    A Monolithic 5.7 A/mm2 91% Peak Efficiency Scalable Multistage Modular Switched Capacitor Voltage Regulator for Base Die Vertical Power Delivery in 3D-ICs
    DOI
    Xiaosen Liu, Jingshu Yu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez H. Ahangharnejhad, Waldemer James, Pelto Christopher, James W. Tschanz, Vivek De
    Intel
  52. JSSC
    2025
    A Monolithic, 10.5 W/mm2, 600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16 nm Class
    DOI
    Suhwan Kim, Harish K. Krishnamurthy, Zakir K. Ahmed, Nachiket Desai, Sheldon Weng, Anne E. Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
    Intel
  53. JSSC
    2025
    Compact PNP BJT-Based Temperature Sensor and Sub-1-V Bandgap Reference for SoC Applications in 4-nm FinFET
    DOI
    You Li, David E. Duarte, James S. Ayers, Yongping Fan
    Intel
  54. VLSI
    2025
    1.536TB/s/mm2 Bandwidth Scalable Attention Accelerator with 22.5GOPS Throughput High Speed SoftMax for Quantized Transformers in Intel 3
    DOI
    Prerna Budhkar, Srivatsa Rangachar Srinivasa, Mirco Sciulli, Gauthaman Murali, Ragh Kuttappa, Paolo Aseron, Trang Nguyen, Vinayak Honkote, Tanay Karnik
    Intel
  55. VLSI
    2025
    A 128Gb/s 0.67pJ/b PAM-4 Transmitter in 18A with RibbonFET and PowerVia
    DOI
    Sandipan Kundu, Jihwan Kim, Khoa Minh Nguyen, Hyung-Seok Kim, Dong Seok Shin, Stephen Kim, Kai Yu, Matthew Clark, Priya Wali, Afonso Teles, Rushdy Saba, Frank O'Mahony, Ajay Balankutty
    Intel
  56. VLSI
    2025
    A 320μm2 Minimum Guard-Band Metal Resistor-Based Temperature Sensor with +/-1.4°C Inaccuracy in 18A RibbonFet CMOS with PowerVia
    DOI
    David Duarte, You Li, James Ayers
    Intel
  57. VLSI
    2025
    A Fully Integrated Buck Voltage Regulator in 16nm with in-Package Air Core Inductor Featuring Digital Computational Control for Fast Transient Responses
    DOI
    Zakir Ahmed, Suhwan Kim, Huong T Do, Harish K Krishnamurthy, Krishnan Ravichandran, James W Tschanz, Vivek De
    Intel
  58. VLSI
    2025
    GUARD: A Fully-Digital TDC-Based Clock and Voltage Glitch Detector with On-Demand Protection in a 28nm CMOS
    DOI
    Mao Li, Paul Xuanyuanliang Huang, Jaehan Park, Sanu K. Mathew, Vivek De, Mingoo Seok
    Columbia University · Intel
  59. CICC
    2024
    Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging
    DOI
    Jihwan Kim, Ariel Cohen, Mike Peng Li, Ajay Balankutty, Sandipan Kundu, Ahmad Khairi, Yoel Krupnik, Yoav Segal, Marco Cusmai, Dror Lazar, Ari Gordon, Noam Familia, Kai Yu, Yutao Liu, Matthew Beach, Priya Wali, Hsinho Wu, Masashi Shimanouchi, Jenny Xiaohong Jiang, Zhiguo Qian, Kemal Aygun, Itamar Levin, Frank O'Mahony
    Intel
  60. CICC
    2024
    Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity
    DOI
    Yuyang Wang, Songli Wang, Robert Parsons, Asher Novick, Vignesh Gopal, Kaylx Jang, Anthony Rizzo, Chia-Pin Chiu, Kaveh Hosseini, Tim Tri Hoang, Sergey Shumarayev, Keren Bergman
    Columbia University · United States Air Force Research Laboratory · Rome Laboratory · Intel
  61. ISSCC
    2024
    14.9 A Monolithic 10.5W/mm2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS
    DOI
    Suhwan Kim, Harish K Krishnamurthy, Zakir Ahmed, Nachiket Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
    Intel
  62. ISSCC
    2024
    15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia
    DOI
    Daeyeon Kim, Yusung Kim, Ayush Shrivastava, Gyusung Park, Anandkumar Mahadevan Pillai, Kunal Bannore, Tri Doan, Muktadir Rahman, Gwanghyeon Baek, Clifford Ong, Xiaofei Wang, Zheng Guo, Eric Karl
    Intel
  63. ISSCC
    2024
    16.6 PACTOR: A Variation-Tolerant Probing-Attack Detector for a 2.5Gb/s×4-Channel Chip-to-Chip Interface in 28nm CMOS
    DOI
    Mao Li, Zhaoqing Wang, Sanu K. Mathew, Vivek De, Mingoo Seok
    Columbia University · Intel
  64. ISSCC
    2024
    18.2 A 4x64Gb/s NRZ 1.3pJ/b Co-Packaged and Fiber-Terminated 4-Ch VCSEL-Based Optical Transmitter
    DOI
    Susnata Mondal, Junyi Qiu, Sashank Krishnamurthy, Joe Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  65. ISSCC
    2024
    2.3 Emerald Rapids: 5th-Generation Intel ® Xeon ® Scalable Processors
    DOI
    Ashley O. Munch, Nevine Nassif, Carleton L. Molnar, Jason Crop, Rich Gammack, Chinmay P. Joshi, Goran Zelic, Kambiz Munshi, Min Huang, Charles R. Morganti, Sireesha Kandula, Arijit Biswas
    Intel
  66. ISSCC
    2024
    22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking
    DOI
    Amy Whitcombe, Somnath Kundu, Hariprasad Chandrakumar, Abhishek Agrawal, Thomas Brown, Steven Callender, Brent Carlton, Stefano Pellerano
    Intel
  67. ISSCC
    2024
    28.4 A Monolithic 12.7W/mm2 Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter
    DOI
    Nicolas Butzen, Harish Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Chris Pelto, James Tschanz
    Intel
  68. ISSCC
    2024
    28.6 An 87% Efficient 2V-Input, 200A Voltage Regulator Chiplet Enabling Vertical Power Delivery in Multi-kW Systems-on-Package
    DOI
    Rinkle Jain, Shunjiang Xu, Rajiv Kaushal, Carlos Mariscal, Humberto Caballero, Tamir Salus, Christopher Schaef, Anup Deka, Aruna Payala, Keng Chen, Huong Do, Jonathan Douglas
    Intel · Intel · Intel
  69. ISSCC
    2024
    7.2 A 224Gb/s sub pJ/b PAM-4 and PAM-6 DAC-Based Transmitter in 3nm FinFET
    DOI
    Marco Cusmai, Noam Familia, Elad Kuperberg, Mohammad Nashash, Dovid Gottesman, Daljeet Kumar, Zvi Marcus, Yeshayahu Horwitz, Sagi Zalcman, Jihwan Kim, Sandipan Kundu, Ilia Radashkevich, Yoav Segal, Dror Lazar, Udi Virobnik, Mike Peng Li, Ariel Cohen
    Intel · Intel · Intel
  70. ISSCC
    2024
    Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica Circuits
    DOI
    Sirish Oruganti, Meizhi Wang, Vishnuvardhan V. Iyer, Yipeng Wang, Mengtian Yang, Raghavan Kumar, Sanu K. Mathew, Jaydeep P. Kulkarni
    The University of Texas at Austin · Intel
  71. JSSC
    2024
    8- λ × 50 Gbps/ λ Heterogeneously Integrated Si-Ph DWDM Transmitter
    DOI
    Cooper S. Levy, Zhe Xuan, Jahnavi Sharma, Duanni Huang, Ranjeet Kumar, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Jinyong Kim, Xinru Wu, Tolga Acikalin, Haisheng Rong, Ganesh Balamurugan, James E. Jaussi
    Intel
  72. JSSC
    2024
    A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%–99.99% Error Coverage in Intel 4 CMOS
    DOI
    Raghavan Kumar, Avinash L. Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu K. Mathew
    Intel
  73. JSSC
    2024
    A 265-GHz CMOS Reflectarray With 98×98 Elements for 1°-Wide Beam Forming and High-Angular-Resolution Radar Imaging
    DOI
    Xibi Chen, Nathan M. Monroe, Georgios C. Dogiamis, Robert A. Stingel, Preston Myers, Ruonan Han
    Massachusetts Institute of Technology · Intel
  74. JSSC
    2024
    A 4.6–400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration
    DOI
    Kaoru Yamashita, Benjamin Hershberg, Kentaro Yoshioka, Hiroki Ishikuro
    慶應義塾大学Keio University · Intel
  75. JSSC
    2024
    A Monolithic 12.7 W/mm2, 92% Peak-Efficiency Switched-Capacitor DC-DC Converter Using CSCR-First Topology
    DOI
    Nicolas Butzen, Harish K. Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Christopher Pelto, James W. Tschanz
    Intel
  76. JSSC
    2024
    A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer
    DOI
    Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad Reza Haghighat, Michael P. Flynn
    University of Michigan · Apple · Qualcomm · Intel
  77. JSSC
    2024
    A Ten-Level Series-Capacitor 24-to-1-V DC–DC Converter With Fast In Situ Efficiency Tracking, Power-FET Code Roaming, and Switch Node Power Rail
    DOI
    Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket Desai, Ram K. Krishnamurthy, Xin Zhang, Mingoo Seok
    Columbia University · Intel · IBM
  78. JSSC
    2024
    An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks
    DOI
    Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan
    Intel · Massachusetts Institute of Technology · Northeastern University · NVIDIA
  79. JSSC
    2024
    Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration
    DOI
    Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Shumarayev, Zhengya Zhang
    University of Michigan · Intel
  80. JSSC
    2024
    DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm
    DOI
    Chuan-Tung Lin, Dewei Wang, Bo Zhang, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok
    Columbia University · Intel
  81. JSSC
    2024
    EQZ-LDO: A Secure Digital Low Dropout Regulator Armed With Detection-Driven Protection Against Correlation Power Analysis
    DOI
    Mao Li, Jaehan Park, Sung Justin Kim, Dongkwun Kim, Sanu K. Mathew, Vivek De, Mingoo Seok
    Columbia University · NVIDIA · Apple · Intel
  82. JSSC
    2024
    eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters
    DOI
    Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
    Google · Intel · The University of Texas at Austin
  83. VLSI
    2024
    A 3.2GHz-15GHz Low Jitter Resonant Clock Featuring Rotary Traveling Wave Oscillators in Intel 4 CMOS for 3D Heterogeneous Multi-Die Systems
    DOI
    Vinayak Honkote, Ragh Kuttappa, Jainaveen Sundaram, Satish Yada, Chinnusamy Kalimuthu, Juhi Patil, Richard Lee, Cristan Paulino, Paolo Aseron, Trang Nguyen, Amreesh Rao, Dileep Kurian, Mingming Xu, Yan Song, Tanay Karnik, Anuradha Srinivasan, Vivek De
    Intel · Intel
  84. VLSI
    2024
    A 4.6pJ/b 64Gb/s Transceiver Enabling PCIe 6.0 and CXL 3.0 in Intel 3 CMOS Technology
    DOI
    Dong-Myung Choi, Yikui Dong, Roan Nicholson, Frank Liu, Wenyan Jia, Vadim Levin, Mike He, Sameer Pradhan, Jieqiong Du, Michael De Vita, Amanda Tran, Reza Navid, Sitaraman Iyer, Rui Song
    Intel
  85. VLSI
    2024
    A 4.7-to-5.3Gbps Fault-Injection Attack Resistant AES-256 Engine Using Isomorphic Composite Fields in Intel 4 CMOS
    DOI
    Raghavan Kumar, Sachin Taneja, Vivek De, Sanu Mathew
    Intel
  86. VLSI
    2024
    A 4×50Gb/s NRZ 1.5pJ/b Co-Packaged and Fiber-Terminated 4-Channel Optical RX
    DOI
    Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joe Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James Jaussi, Mozhgan Mansuri
    Intel
  87. VLSI
    2024
    A 5.4V-Vin, 9.3A/mm2 10MHz Buck IVR Chiplet in 55nm BCD Featuring Self-Timed Bootstrap and Same-Cycle ZVS Control
    DOI
    Sally Amin, Harish Krishnamurthy, Huong Do, Claudio Alvarez, Mike Hill, Kaladhar Radhakrishnan, Vivek De, Sheldon Weng, Krishnan Ravichandran, Jim Tschanz, Wilfred Gomes, Jonathan Douglas
    Intel
  88. VLSI
    2024
    A 65nm Delta-Sigma ADC Based VDD-Variation-Tolerant Power-Side-Channel-Attack Monitor with Detection Capability Down to 0.25Ω
    DOI
    Shota Konno, Zachary J. Ellis, Anupam Golder, Sigang Ryu, Daniel Dinu, Avinash Varna, Sanu Mathew, Arijit Raychowdhury
    Georgia Institute of Technology · Intel
  89. VLSI
    2024
    A Monolithic 5.7A/mm2 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs
    DOI
    Y. Jingshu, Xiaosen Liu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K Krishnamurthy, Krishnan Ravichandran, Ramez H Ahangharnejhad, Waldemer Jim, Pelto Christopher, James W Tschanz, Vivek De
    Intel
  90. VLSI
    2024
    A PVT Robust 8-Bit Signed Analog Compute-In-Memory Accelerator with Integrated Activation Functions for AI Applications
    DOI
    Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Niranjan Gowda, Brent Carlton
    Intel
  91. VLSI
    2024
    A Scalable mK Cryo-CMOS Demultiplexer Chip for Voltage Biasing and High-Speed Control of Silicon Qubit Gates
    DOI
    Sushil Subramanian, Todor M Mladenov, Simon Schaal, Bishnu Patra, Lester Lampert, Nancy K Robinson, Jeanette Roberts, Stefano Pellerano
    Intel
  92. CICC
    2023
    A 3D-integrated 8λ × 32 Gbps λ Silicon Photonic Microring-based DWDM Transmitter
    DOI
    Cooper Levy, Zhe Xuan, Duanni Huang, Ranjeet Kumar, Jahnavi Sharma, Taehwan Kim, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Jinyong Kim, Xinru Wu, Ganesh Balamurugan, Haisheng Rong, James Jaussi
    Intel
  93. CICC
    2023
    A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking
    DOI
    Xi Chen, Aly Shoukry, Tianyu Jia, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
    Northwestern University · Texas Instruments · Intel
  94. CICC
    2023
    Open-Source AXI4 Adapters for Chiplet Architectures
    DOI
    Nij Dorairaj, David Kehlet, Farhana Sheikh, Julie Zhang, YunHui Huang, Shawn Wang
    Intel
  95. CICC
    2023
    Power and EM SCA Resilience in 65nm AES-256 Exploiting Clock-Slew Dependent Variability in CMOS Digital Circuits
    DOI
    Archisman Ghosh, Md. Abdur Rahman, Debayan Das, Santosh Ghosh, Shreyas Sen
    Purdue University West Lafayette · Intel
  96. CICC
    2023
    Silicon Process Technology Constraints for Standardized Vertical Die-to-Die Interconnects
    DOI
    Harrison Liew, Farhana Sheikh, David Kehlet, Borivoje Nikolić
    Intel · University of California, Berkeley
  97. ESSERC
    2023
    93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code Roaming
    DOI
    Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket Desai, Ram K. Krishnamurthy, Orlando Lazaro, Andres Blanco, Xin Zhang, Mingoo Seok
    Columbia University · Intel · Texas Instruments · IBM
  98. ESSERC
    2023
    A 4nm FinFET 0.8V 13ppm/°C Switched Capacitor Based Current Mode Bandgap Reference
    DOI
    Huanhuan Zhang, Alexander Lyakhov, Arvind Raghavan
    Intel
  99. ESSERC
    2023
    microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware
    DOI
    Dewei Wang, Jonghyun Oh, Gregory K. Chen, Phil Knag, Ram K. Krishnamurthy, Mingoo Seok
    Columbia University · Intel
  100. ISSCC
    2023
    14.4 A Monolithic 26A/mm2Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter
    DOI
    Nicolas Butzen, Harish Krishnarnurthy, Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James Tschanz, Jonathan Douglas
    Intel
  101. ISSCC
    2023
    15.5 A 100Gbps Fault-Injection Attack Resistant AES-256 Engine with 99.1-to-99.99% Error Coverage in Intel 4 CMOS
    DOI
    Raghavan Kumar, Avinash Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu Mathew
    Intel
  102. ISSCC
    2023
    18.2 A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET
    DOI
    Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas Brown, Brent Carlton, Christopher Hull, Steven Callender, Stefano Pellerano
    Intel · Apple · Amazon
  103. ISSCC
    2023
    9.4 An In-depth Look at the Intel IPU E2000
    DOI
    Naru Sundar, Brad Burres, Yadong Li, Dave Minturn, Brian Johnson, Nupur Jain
    Intel
  104. ISSCC
    2023
    A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit Density
    DOI
    Ali Khakifirooz, Eduardo Anaya, Sriram Balasubrahrmanyam, Geoff Bennett, Daniel Castro, John Egler, Kuangchan Fan, Rifat Ferdous, Kartik Ganapathi, Omar Guzman, Chang Wan Ha, Rezaul Haque, Vinaya Harish, Majid Jalalifar, Owen W. Jungroth, Sung-Taeg Kang, Golnaz Karbasian, Jee-Yeon Kim, Siyue Li, Aliasgar S. Madraswala, Srivijay Maddukuri, Amr Mohammed, Shanmathi Mookiah, Shashi Nagabhushan, Binh Ngo, Deep Patel, Sai Kumar Poosarla, Naveen V. Prabhu, Carlos Quiroga, Shantanu Rajwade, Ahsanur Rahman, Jalpa Shah, Rohit S. Shenoy, Ebenezer Tachie Menson, Archana Tankasala, Sandeep Krishna Thirumala, Sagar Upadhyay, Krishnasree Upadhyayula, Ashley Velasco, Nanda Kishore Babu Vemula, Bhaskar Venkataramaiah, Jiantao Zhou, Bharat M. Pathak, Pranav Kalavade
    Intel
  105. JSSC
    2023
    A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels
    DOI
    Ahmad Khairi, Yoel Krupnik, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen
    Intel · Intel · Texas A&M University
  106. JSSC
    2023
    A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET
    DOI
    Abhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas W. Brown, Brent R. Carlton, Christopher Hull, Steven Callender, Stefano Pellerano
    Intel
  107. JSSC
    2023
    A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2 × 2 Dielet With 10-μm Pitch Interdielet I/O for Runtime Multiprogram Reconfiguration
    DOI
    Sumeet Singh Nagi, Uneeb Rathore, Krutikesh Sahoo, Tim Ling, Subramanian S. Iyer, Dejan Markovic
    Intel · University of California, Los Angeles · Apple
  108. JSSC
    2023
    A 2-Gb/s UWB Transceiver for Short-Range Reconfigurable FDD Wireless Networks
    DOI
    Renzhi Liu, Asma Beevi K. T., Richard Dorrance, Timothy F. Cox, Rinkle Jain, Tolga Acikalin, Zhen Zhou, Tae-Young Yang, Johanny Escober-Pelaez, Shuhei Yamada, Kenneth P. Foust, Brent R. Carlton
    Intel
  109. JSSC
    2023
    A 334 μW 0.158 mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom–Cook Multiplication
    DOI
    Archisman Ghosh, Jose Maria Bermudo Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen
    Purdue University West Lafayette · PQShield (United Kingdom) · KU Leuven · Indian Institute of Technology Kanpur · Intel
  110. JSSC
    2023
    A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS
    DOI
    Raghavan Kumar, Vikram B. Suresh, Sachin Taneja, Mark A. Anders, Steven Hsu, Amit Agarwal, Vivek De, Sanu K. Mathew
    Intel
  111. JSSC
    2023
    A 90.4% Peak Efficiency 48-to-1-V GaN/Si Hybrid Converter With Three-Level Hybrid Dickson Topology and Gradient Descent Run-Time Optimizer
    DOI
    Minxiang Gong, Hua Chen, Xin Zhang, Rinkle Jain, Arijit Raychowdhury
    Georgia Institute of Technology · IBM · Intel
  112. JSSC
    2023
    A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference
    DOI
    Rishabh Sehgal, Tanmay Thareja, Shanshan Xie, Can Ni, Jaydeep P. Kulkarni
    The University of Texas at Austin · Intel · Apple
  113. JSSC
    2023
    A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference
    DOI
    Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent Carlton
    Intel
  114. JSSC
    2023
    A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW
    DOI
    Amy Whitcombe, Chun C. Lee, Asma Beevi Kuriparambil Thekkumpate, Somnath Kundu, Jaykant Timbadiya, Abhishek Agrawal, Brent Carlton, Peter Sagazio, Stefano Pellerano, Christopher Hull
    Intel · Intel · Amazon
  115. JSSC
    2023
    An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS
    DOI
    Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy
    Intel
  116. JSSC
    2023
    An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET
    DOI
    Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton
    Intel
  117. JSSC
    2023
    Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology
    DOI
    Yusung Kim, Clifford Ong, Anandkumar Mahadevan Pillai, Harish Jagadeesh, Gwanghyeon Baek, Iqbal Rajwani, Zheng Guo, Eric Karl
    Intel
  118. VLSI
    2023
    218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication Accelerator with a Crypto-Double-Coupled PUF in 4nm class CMOS
    DOI
    Sachin Taneja, Vikram Suresh, Raghavan Kumar, Vivek De, Sanu Mathew
    Intel
  119. VLSI
    2023
    A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS
    DOI
    C. Augustine, P. Meinerzhagen, W. Lim, A. Veerabathini, M. Bright, K. Mojjada, J. Tschanz, M. Khellah, V. De
    Intel
  120. VLSI
    2023
    A 256 Gbps Heterogeneously Integrated Silicon Photonic Microring-based DWDM Receiver Suitable for In-Package Optical I/O
    DOI
    Zhe Xuan, Ganesh Balamurugan, Duanni Huang, Ranjeet Kumar, Jahnavi Sharma, Cooper Levy, Jinyong Kim, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Xinru Wu, Tolga Acikalin, Haisheng Rong, James Jaussi
    Intel
  121. VLSI
    2023
    Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 Interface to Provide Versatile Workload Acceleration
    DOI
    Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Shumarayev, Zhengya Zhang
    University of Michigan · Intel
  122. VLSI
    2023
    Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs
    DOI
    Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket Desai, Jie Gu
    Northwestern University · Texas Instruments · Intel
  123. A-SSCC
    2022
    A D-Band Packaged CMOS Integrated Transmitter for MU-MIMO Applications
    DOI
    Meng Wei, Nima Baniasadi, Ethan Chou, Hesham Beshary, Sashank Krishnamurthy, Elad Alon, Ali Niknejad
    University of California, Berkeley · Intel
  124. A-SSCC
    2022
    A Digital LDO in 22nm CMOS with a 4b Self-triggered Binary Search Windowed Flash ADC Featuring Automatic Analog Layout Generator Framework
    DOI
    Xiaosen Liu, Soner Yaldiz, Parijat Mukherjee, Steven Burns, Harish Krishnamurthy, Krishnan Ravichandran, Zakir Ahmed, Nachiket Desai, Nicolas Butzen, James Tschanz, Vivek De
    Intel · Tsinghua University
  125. A-SSCC
    2022
    Energy Efficient BNN Accelerator using CiM and a Time-Interleaved Hadamard Digital GRNG in 22nm CMOS
    DOI
    Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent Carlton
    Intel
  126. CICC
    2022
    A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator
    DOI
    Archisman Ghosh, J.M.B. Mera, Angshuman Karmakar, Debayan Das, Santosh Ghosh, Ingrid Verbauwhede, Shreyas Sen
    Purdue University West Lafayette · KU Leuven · Intel
  127. CICC
    2022
    A 48dB-SFDR, 43dB-SNDR, 50GS/s 9-bit 2x-interleaved Nyquist DAC in Intel 16
    DOI
    Hariprasad Chandrakumar, Thomas W. Brown, Dimitri Frolov, Zinia Tuli, Iwen Huang, Said Rami
    Intel
  128. CICC
    2022
    A Digital Cascoded Signature Attenuation Countermeasure with Intelligent Malicious Voltage Drop Attack Detector for EM/Power SCA Resilient Parallel AES-256
    DOI
    Archisman Ghosh, Dong-Hyun Seo, Debayan Das, Santosh Ghosh, Shreyas Sen
    Purdue University West Lafayette · Intel
  129. CICC
    2022
    Cryogenic CMOS for Qubit Control and Readout
    DOI
    Stefano Pellerano, Sushil Subramanian, Jong-Seok Park, Bishnu Patra, Todor Mladenov, Xiao Xue, Lieven M. K. Vandersypen, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano
    Intel · Delft University of Technology · École Polytechnique Fédérale de Lausanne
  130. CICC
    2022
    PVT Tolerant Zero Bit-Error-Rate Physical Unclonable Function Exploiting Hot Carrier Injection Aging in 7nm FinFET Technology
    DOI
    Jyothi Bhaskarr Velamala, Siang-jhih Sean Wu, Padma Penmatsa, Kuan-Yueh James Shen, David Johnston, Rachael Parker
    Intel
  131. ESSERC
    2022
    Fine-Grained Electromagnetic Side-Channel Analysis Resilient Secure AES Core with Stacked Voltage Domains and Spatio-temporally Randomized Circuit Blocks
    DOI
    Meizhi Wang, Sirish Oruganti, Shanshan Xie, Raghavan Kumar, Sanu Mathew, Jaydeep P Kulkarni
    The University of Texas at Austin · Intel
  132. ESSERC
    2022
    Innovations for Intelligent Edge
    DOI
    Vida Ilderem, Stefano Pellerano, Jim Tschanz, Tanay Karnik, Vivek De
    Intel
  133. ESSERC
    2022
    On-Chip High-Resolution Timing Characterization Circuits for Memory IPs
    DOI
    Amit Agarwal, Steven Hsu, Mark Anders, Gunjan Pandya, Ram Krishnamurthy, James Tschanz, Vivek De
    Intel
  134. ISSCC
    2022
    A 0.049mm2 7.1-to-16.8GHz Dual-Core Triple-Mode VCO Achieving 200dB $\mathbf{FoM}_{\mathbf{A}}$ in 22nm FinFET
    DOI
    Jiang Gong, Bishnu Patra, Luc Enthoven, Job van Staveren, Fabio Sebastiano, Masoud Babaie
    QuTech · Delft University of Technology · Intel
  135. ISSCC
    2022
    A 0.76V V in Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer
    DOI
    Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir Ahmed, Nachiket Desai, Nicolas Butzen, James Tschanz, Vivek De
    Intel
  136. ISSCC
    2022
    A 1-58.125Gb/s, 5-33dB IL Multi-Protocol Ethernet-Compliant Analog PAM-4 Receiver with 16 DFE Taps in 10nm
    DOI
    Bahram Zand, Mike Bichan, Alireza Mahmoodi, Mansour Shashaani, Jing Wang, Ruslana Shulyzki, James Guthrie, Katya Tyshchenko, Junhong Zhao, Eric Liu, Nima Soltani, Al Freeman, Rishi Anand, Syed Rubab, Ranjit Khela, Shaham Sharifian, Karl Herterich
    Intel
  137. ISSCC
    2022
    A 1.41pJ/b 224Gb/s PAM-4 SerDes Receiver with 31dB Loss Compensation
    DOI
    Yoav Segal, Amir Laufer, Ahmad Khairi, Yoel Krupnik, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky, Udi Virobnik, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Ariel Cohen
    Intel · Intel · Texas A&M University
  138. ISSCC
    2022
    A 16nm, +28dBm Dual-Band All-Digital Polar Transmitter Based on 4-core Digital PA for Wi-Fi6E Applications
    DOI
    Bassam Khamaisi, David Ben-Haim, Anna Nazimov, A. Ben-Bassat, S. Gross, N. Shay, G. Asa, V. Spector, Y. Eilat, A. Azam, E. Borokhovich, I. Shternberg, P. Skliar, E. Solomon, A. Beidas, T. A. Hazira, A. Lane, E. Shaviv, G. Nudelman, E. Dahan, M. S. Shemer, N. Kimiagarov, Ashoke Ravi, Ofir Degani
    Intel · Intel
  139. ISSCC
    2022
    A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup
    DOI
    Somnath Kundu, Timo Huusari, Hao Luo, Abhishek Agrawal, Eduardo Alban, Sarah Shahraini, Thao Xiong, Dan Lake, Stefano Pellerano, Jason Mix, Nasser Kurd, Mohamed Abdel-moneum, Brent Carlton
    Intel
  140. ISSCC
    2022
    A CMOS Cellular Interface Array for Digital Physiology Featuring High-Density Multi-Modal Pixels and Reconfigurable Sampling Rate
    DOI
    Adam Y. Wang, Yuguo Sheng, Wanlu Li, Doohwan Jung, Greg Junek, Jongseok Park, Dongwon Lee, Mian Wang, Sushila Maharjan, Sagar Kumashi, Jin Hao, Yu Shrike Zhang, Kevin Eggan, Hua Wang
    George Eliava Institute of Bacteriophage, Microbiology and Virology · Harvard University · Qualcomm · Intel
  141. ISSCC
    2022
    A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology
    DOI
    Steven Callender, Amy Whitcombe, Abhishek Agrawal, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios Dogiamis, Brent Carlton, Mark Chakravorti, Stefano Pellerano, Christopher Hull
    Intel · Indian Institute of Technology Delhi
  142. ISSCC
    2022
    A I Max $\vert_{\max^{,}}$ Fully Integrated Multi-Phase Voltage Regulator with 91.5% Peak Efficiency at 1.8 to 1V, Operating at 50MHz and Featuring a Digitally Assisted Controller with Automatic Phase Shedding and Soft Switching in 4nm Class FinFET CMOS
    DOI
    Christopher Schaef, Tamir Salus, Rachid Rayess, Siddarth Kulasekaran, Mat Manusharow, Kaladhar Radhakrishnan, Jonathan Douglas
    Intel · Intel
  143. ISSCC
    2022
    A Multimode 157μW 4-Channel 80dBA-SNDR Speech-Recognition Frontend With Self-DOA Correction Adaptive Beamformer
    DOI
    Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad R. Haghighat, Michael P. Flynn
    University of Michigan · Intel
  144. ISSCC
    2022
    An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS
    DOI
    Raghavan Kumar, Vikram B. Suresh, Mark A. Anders, Steven K. Hsu, Amit Agarwal, Vivek K. De, Sanu K. Mathew
    Intel
  145. ISSCC
    2022
    Bonanza Mine: an Ultra-Low-Voltage Energy-Efficient Bitcoin Mining ASIC
    DOI
    Vikram B. Suresh, Chandra S. Katta, Srinivasan Rajagopalan, Tao Z. Zhou, Amit Kumar Patel, Raju Rakha, Nikhil Krishna Gopalakrishna, Sanu Mathew, Ajat Hukkoo
    Intel
  146. ISSCC
    2022
    DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware
    DOI
    Dewei Wang, Chuan-Tung Lin, Gregory K. Chen, Phil Knag, Ram K. Krishnamurthy, Mingoo Seok
    Columbia University · Intel
  147. ISSCC
    2022
    Electronic THz Pencil Beam Forming and 2D Steering for High Angular-Resolution Operation: A 98 $\times$ 98-Unit 265GHz CMOS Reflectarray with In-Unit Digital Beam Shaping and Squint Correction
    DOI
    Nathan M. Monroe, Georgios C. Dogiamis, Robert Stingel, Preston Myers, Xibi Chen, Ruonan Han
    Massachusetts Institute of Technology · Intel
  148. ISSCC
    2022
    Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing
    DOI
    Wilfred Gomes, Altug Koker, Pat Stover, Doug Ingerly, Scott Siers, Srikrishnan Venkataraman, Chris Pelto, Tejas Shah, Amreesh Rao, Frank O'Mahony, Eric Karl, Lance Cheney, Iqbal Rajwani, Hemant Jain, Ryan Cortez, Arun Chandrasekhar, Basavaraj Kanthi, Raja Koduri
    Intel · Intel
  149. ISSCC
    2022
    Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor
    DOI
    Nevine Nassif, Ashley O. Munch, Carleton L. Molnar, Gerald Pasdast, Sitaraman V. Lyer, Zibing Yang, Oscar Mendoza, Mark Huddart, Srikrishnan Venkataraman, Sireesha Kandula, Rafi Marom, Alexandra M. Kern, Bill Bowhill, David R. Mulvihill, Srikanth Nimmagadda, Varma Kalidindi, Jonathan Krause, Mohammad M. Haq, Roopali Sharma, Kevin Duda
    Intel · Intel · Intel
  150. JSSC
    2022
    A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS
    DOI
    Hao Li, Chun-Ming Hsu, Jahnavi Sharma, James Jaussi, Ganesh Balamurugan
    Intel
  151. JSSC
    2022
    A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction
    DOI
    Huiyu Mo, Wenping Zhu, Wenjing Hu, Qiang Li, Ang Li, Shouyi Yin, Shaojun Wei, Leibo Liu
    Tsinghua University · Chinese Academy of Sciences · Intel
  152. JSSC
    2022
    A 128 Gb/s, 11.2 mW Single-Ended PAM4 Linear TIA With 2.7 μ A rms Input Noise in 22 nm FinFET CMOS
    DOI
    Saeid Daneshgar, Hao Li, Taehwan Kim, Ganesh Balamurugan
    Intel
  153. JSSC
    2022
    A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET
    DOI
    Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen T. Kim, Yutao Liu, Savyasaachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuan-Chang Liu, Dongseok Shin, Ariel Cohen, Yoav Segal, Yongping Fan, Peng Li, Frank O'Mahony
    Intel
  154. JSSC
    2022
    A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors
    DOI
    Nachiket Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
    Intel
  155. JSSC
    2022
    A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS
    DOI
    Hao Luo, Somnath Kundu, Timo Huusari, Sarah Shahraini, Eduardo Alban, Jason Mix, Nasser Kurd, Mohamed Abdel-Moneum, Brent Carlton
    Intel
  156. JSSC
    2022
    A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications
    DOI
    Dongseok Shin, Hyung Seok Kim, Chuan-Chang Liu, Priya Wali, Savyasaachi Keshava Murthy, Yongping Fan
    Intel
  157. JSSC
    2022
    A Frequency-Locked Oscillator Using Complex RC Impedance IQ-Balancing
    DOI
    Boyu Shen, Soumya Bose, Matthew L. Johnston
    Oregon State University · Texas Instruments · Intel
  158. JSSC
    2022
    A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET
    DOI
    Steven Callender, Abhishek Agrawal, Amy Whitcombe, Ritesh Bhat, Mustafijur Rahman, Chun C. Lee, Peter Sagazio, Georgios C. Dogiamis, Brent R. Carlton, Christopher Hull, Stefano Pellerano
    Intel · Indian Institute of Technology Delhi · Amazon
  159. JSSC
    2022
    A Pulsed-Coherent Lidar With Sub-10 μm Precision
    DOI
    Li-Yang Chen, Abhinav Kumar Vinod, James F. McMillan, Hangbo Yang, Chee Wei Wong, C.-K. Ken Yang
    University of California, Los Angeles · Xilinx (United States) · Intel
  160. JSSC
    2022
    A Scalable 32–56 Gb/s 0.56–1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS
    DOI
    Mozhgan Mansuri, Rajesh Inti, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James Jaussi
    Intel · NVIDIA
  161. JSSC
    2022
    An Eight-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor
    DOI
    Seungjong Lee, Taewook Kang, John Bell, Mohammad Haghighat, Alberto Martinez, Michael P. Flynn
    University of Michigan · Qualcomm · Intel · Microsoft
  162. JSSC
    2022
    Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control
    DOI
    Chi-Hsiang Huang, Yidong Chen, Xun Sun, Arindam Mandal, Venkata Rajesh Pamula, Nasser Kurd, Visvesh S. Sathe
    University of Washington · Intel
  163. JSSC
    2022
    Silicon Photonic Microring-Based 4 × 112 Gb/s WDM Transmitter With Photocurrent-Based Thermal Control in 28-nm CMOS
    DOI
    Jahnavi Sharma, Zhe Xuan, Hao Li, Taehwan Kim, Ranjeet Kumar, Meer N. Sakib, Chun-Ming Hsu, Chaoxuan Ma, Haisheng Rong, Ganesh Balamurugan, James Jaussi
    Intel
  164. JSSC
    2022
    Syn-STELLAR: An EM/Power SCA-Resilient AES-256 With Synthesis-Friendly Signature Attenuation
    DOI
    Archisman Ghosh, Debayan Das, Josef Danial, Vivek De, Santosh Ghosh, Shreyas Sen
    Purdue University West Lafayette · Intel
  165. VLSI
    2022
    2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators
    DOI
    Steven Hsu, Amit Agarwal, Mark Anders, Arnab Raha, Raymond Sung, Deepak Mathaikutty, Ram Krishnamurthy, James Tschanz, Vivek De
    Intel
  166. VLSI
    2022
    5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O
    DOI
    Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O’Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Chris Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade
    Intel · Ayar Labs (United States)
  167. VLSI
    2022
    5G mmWave Power Amplifier and Low-Noise Amplifier in 300mm GaN-on-Si Technology
    DOI
    Qiang Yu, Han Wui Then, Derek Thomson, Jessica Chou, Jeffrey Garrett, Iwen Huang, Ibukunoluwa Momson, Surej Ravikumar, Seahee Hwangbo, Alvaro Latorre-Rey, Ananda Roy, Marko Radosavljevic, Michael Beumer, Pratik Koirala, Nicole Thomas, Nityan Nair, Heli Vora, Samuel Bader, Johann Rode, Jonathan Jensen, Said Rami
    Intel
  168. VLSI
    2022
    A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference
    DOI
    Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen Liu, Dan Lake, Brent Carlton, May Wu
    Intel
  169. VLSI
    2022
    A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW
    DOI
    Amy Whitcombe, Chun Lee, Asma Kuriparambil Thekkumpate, Somnath Kundu, Jaykant Timbadiya, Abhishek Agrawal, Brent Carlton, Peter Sagazio, Stefano Pellerano, Christopher Hull
    Intel · Intel
  170. VLSI
    2022
    A 7Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS
    DOI
    Raghavan Kumar, Vikram Suresh, Sachin Taneja, Mark Anders, Steven Hsu, Amit Agarwal, Vivek De, Sanu Mathew
    Intel
  171. VLSI
    2022
    A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOS
    DOI
    You Li, David E. Duarte, Yongping Fan
    Intel
  172. VLSI
    2022
    A High Output Power 1V Charge Pump and Power Switch for Configurable, In-Field-Programmable Metal eFuse on Intel 4 Logic Technology
    DOI
    Stafford Hutchins, Jiabo Li, Atresh Sanne, Zhanping Chen, Mohammad M. Hasan, Uddalak Bhattacharya, Eric Karl, Jaydeep P. Kulkarni
    Intel · The University of Texas at Austin
  173. VLSI
    2022
    An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS
    DOI
    Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy
    Intel
  174. VLSI
    2022
    Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology
    DOI
    Yusung Kim, Clifford Ong, Anandkumar Mahadevan Pillai, Harish Jagadeesh, Gwanghyeon Baek, Iqbal Rajwani, Zheng Guo, Eric Karl
    Intel
  175. VLSI
    2022
    Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation
    DOI
    Nachiket Desai, Harish K. Krishnamurthy, Suhwan Kim, Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Krishnan Ravichandran, James W. Tschanz, Vivek De
    Intel
  176. VLSI
    2022
    Gain-Cell CIM: Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt Trigger ADCs
    DOI
    Shanshan Xie, Can Ni, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
    The University of Texas at Austin · Intel