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VLSI · 2022–2026 LIVE

National Yang Ming Chiao Tung University

対象論文Papers 16 · 筆頭著者first author 12 · 著者按分fractional 9.88 · 台湾Taiwan #1 · 世界World #9

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Ke-Horng Chen ORCID7
2Kuo-Lin Zheng5
3Chi-Yu Chen ORCID3
3Po-Jui Chiu ORCID3
3Xiao-Quan Wu ORCID3
3Yu-Ting Huang ORCID3
7Hung-Ming Chen2
7Kuan-Neng Chen2
7Po-Tsang Huang2
7Sheng-Hsi Hung ORCID2
7Shi-Jun Zeng2
7Tuo-Hung Hou2
7Tz-Wun Wang ORCID2
7Wei Lu2
7Yu-Teng Liang2
16Chang-Lin Go1
16Cheng- Tse Tsai1
16Cheng-Ying Lee1
16Chien-Wei Cho1
16Chun-Yuan Chen1
16Dao-Han Yao ORCID1
16Fu-Bin Yang ORCID1
16Guan-Ye Chen1
16Hong-Teng Wu1
16Hsing-Yen Tsai ORCID1
16J. C. Guo1
16Kuo-Lin Zeng1
16M. J. Huang1
16Po- Hsun Chu1
16Po-Hung Chen ORCID1
16Seng-Yu Peng1
16Steve S. Chung1
16T. C. Kao1
16Tian-Sheuan Chang1
16Tsung-Heng Tsai1
16Tsung-Yen Tsai1
16Wei-Jhih Jian ORCID1
16Wei-Zen Chen1
16Y. K. Wang1
16Y. R. Liu1
16Y.-T. Lin1
16Yu-Chen Kuo1
16Yu-Siang Chou1
16Yu-Te Liao ORCID1
16Yu-Tse Shih ORCID1
16Z. M. Tsai1

対象論文Papers

  1. VLSI
    2026
    A Hybrid LDO with Region-Detection and Power-Supply-Rejection-Based Control Achieving High PSR and Fast Transient Response
    DOI
    Yu-Ting Huang, Xiao-Quan Wu, Chi-Yu Chen, Po-Jui Chiu, Chien-Wei Cho, Ke-Horng Chen, Seng-Yu Peng, Tsung-Heng Tsai, Ying-His Lin, Shian-Ru Lin, Tsung-Yen Tsai
    National Yang Ming Chiao Tung University · Realtek
  2. VLSI
    2025
    An 85.6%-Efficiency Supply Modulator with Auxiliary Bidirectional Power for 200MHz 5G NR Applications
    DOI
    Chun-Yuan Chen, Cheng-Ying Lee, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai
    National Yang Ming Chiao Tung University · Realtek
  3. VLSI
    2025
    Compact, Low-Loss, Cost-Effective, CMOS Embedded RF Switch Solution Achieving DC-100GHz True-Time Delay Phase Shifter by Phase Change Material
    DOI
    H.J. Li, K.P. Chang, C.E. Chen, Y.T. Lin, C.C. Huang, Y.W. Wang, W.F. Chen, H.Y. Chen, C.R. Hsieh, Z.H. Ya, H.H. Wang, Y.W. Ting, K.C. Tseng, Z. M. Tsai, K.C. Huang, Harry Chuang
    TSMC · National Yang Ming Chiao Tung University
  4. VLSI
    2025
    Enabling Privacy-Preserving Collective Intelligence: A Twin In-Memory Encryption/Processing Macro Featuring Group Differential Privacy and Spatial-Temporal Ensemble
    DOI
    Bo-Cheng Chiou, Chih-Sheng Lin, Yun-Ting Ho, Yu-Hui Lin, I-Ta Wu, Kuo-Hua Tseng, Chih-Ming Lai, Peng-I Mei, Sih-Han Li, Shan-Ming Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Tuo-Hung Hou
    Industrial Technology Research Institute · National Yang Ming Chiao Tung University
  5. VLSI
    2024
    A 12V-to-1V 100A Inverted Pyramid Trans-Inductor Voltage Regulator Converter with 93.6% High Efficiency and Fast Transient Response
    DOI
    Yu-Chen Kuo, Hong-Teng Wu, Guan-Ye Chen, Ke-Horng Chen, Kuo-Lin Zheng, Chih-Chen Li
    National Yang Ming Chiao Tung University · MediaTek
  6. VLSI
    2024
    A 15.4ppm/○C GaN-based Voltage Reference with Process-Variation-Immunity and High PSR for EV Power Systems
    DOI
    Po-Jui Chiu, Tz-Wun Wang, Chi-Yu Chen, Sheng-Hsi Hung, Yu-Ting Huang, Xiao-Quan Wu, Ke-Horng Chen, Kuo-Lin Zheng, Chih-Chen Li
    National Yang Ming Chiao Tung University · MediaTek
  7. VLSI
    2024
    A Monolithic GaN-based Gate Driver for LLC-SRC with Three-Phase Startup Clamping Achieving 23.2μA IQ and 98.6% Peak Efficiency
    DOI
    Chi-Yu Chen, Tz-Wun Wang, Po-Jui Chiu, Sheng-Hsi Hung, Chang-Lin Go, Xiao-Quan Wu, Yu-Ting Huang, Ke-Horng Chen, Kuo-Lin Zeng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai
    National Yang Ming Chiao Tung University · Realtek
  8. VLSI
    2024
    A Monolithic Low-ILEAK Cross-Coupled GaN Driver with ΔΦ-Reduced EMI-Rejecter for 21.51dBµV-EMI-Reduction and 1/10x filter-capacitor
    DOI
    Hsing-Yen Tsai, Shi-Jun Zeng, Yu-Teng Liang, Ke-Horng Chen, Kuo-Lin Zheng, Chih-Chen Li
    National Yang Ming Chiao Tung University · MediaTek
  9. VLSI
    2024
    A Pulsed Electrochemistry Readout IC with Slew-rate Booting Technique and Phase-domain ΔΣ ADC for Si-Nanowire Electrical Double-layer Capacitance Measurement
    DOI
    Po- Hsun Chu, Cheng- Tse Tsai, Yu-Siang Chou, Nitish Kumar, Shu-Ping Lin, Yu-Te Liao
    National Yang Ming Chiao Tung University · National Chung Hsing University
  10. VLSI
    2024
    A ±100A Auto-Calibration Current Sensor with 80V Pulse-Width Modulation Attenuation and 0.15% Gain Error
    DOI
    Yu-Teng Liang, Shi-Jun Zeng, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Chih-Chen Li
    National Yang Ming Chiao Tung University · MediaTek
  11. VLSI
    2024
    An Ultra-Low Voltage Auger-Recombination Enhanced Hot Hole Injection Scheme in Implementing a 3 Bits per Cell e-DRAM CIM Macro for Inference Accelerator
    DOI
    T. C. Kao, M. J. Huang, Y. R. Liu, Y. K. Wang, J. C. Guo, Steve S. Chung
    National Yang Ming Chiao Tung University
  12. VLSI
    2024
    Empowering Local Differential Privacy: A 5718 TOPS/W Analog PUF-Based In-Memory Encryption Macro for Dynamic Edge Security
    DOI
    Chih-Sheng Lin, Bo-Cheng Chiou, Yin-Jia Yang, Jian-Wei Su, Kuo-Hua Tseng, Yun-Ting Ho, Chih-Ming Lai, Sih-Han Li, Tian-Sheuan Chang, Shan-Ming Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Tuo-Hung Hou
    Industrial Technology Research Institute · National Yang Ming Chiao Tung University
  13. VLSI
    2024
    Scalable Embedded Multi-Die Active Bridge (S-EMAB) Chips with Integrated LDOs for Low-Cost Programmable 2.5D/3.5D Packaging Technology
    DOI
    Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang
    National Yang Ming Chiao Tung University · Industrial Technology Research Institute
  14. VLSI
    2022
    A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fsrms Resolution with Background Self-Calibration
    DOI
    Wei-Jhih Jian, Wei-Zen Chen
    National Yang Ming Chiao Tung University
  15. VLSI
    2022
    A Shared-Inductor Structure-Reconfigurable Regulating Rectifier (SR-RR) Enabling 6.78-MHz AC-DC Rectification and 1-MHz DC-DC Energy Recycling
    DOI
    Fu-Bin Yang, Dao-Han Yao, Po-Hung Chen
    National Yang Ming Chiao Tung University
  16. VLSI
    2022
    An Embedded Multi-Die Active Bridge (EMAB) Chip for Rapid-Prototype Programmable 2.5D/3D Packaging Technology
    DOI
    Jie Zhang, Wei Lu, Po-Tsang Huang, Sih-Han Li, Tsung-Yi Hung, Shih-Hsien Wu, Ming-Ji Dai, I-Shan Chung, Wen-Chao Chen, Chin-Hung Wang, Shyh-Shyuan Sheu, Hung-Ming Chen, Kuan-Neng Chen, Wei-Chung Lo, Chih-I Wu
    Industrial Technology Research Institute · National Yang Ming Chiao Tung University