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大学University · アメリカUSA · 2022–2026 LIVE

Oregon State University

アメリカUSA 30位 (0 pt) · 世界World 25位 (0 pt) · 対象論文Papers 28

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

01234562022 ISSCC: 12022 VLSI: 12022 JSSC: 32022 CICC: 1620222023 ISSCC: 22023 JSSC: 3520232024 ISSCC: 12024 JSSC: 42024 ESSERC: 1620242025 ISSCC: 12025 VLSI: 12025 JSSC: 12025 CICC: 2520252026 ISSCC: 22026 JSSC: 32026 CICC: 162026
ISSCCVLSIJSSCCICCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC12112
VLSI1––1–
JSSC33413
CICC1––21
ESSERC––1––

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1754.50アメリカUSA #11 · 世界World #40
VLSI Tier 1222.00アメリカUSA #19 · 世界World #65
JSSC Tier 11498.31アメリカUSA #13 · 世界World #48
CICC Tier 2443.40アメリカUSA #16 · 世界World #52
A-SSCC Tier 2000.00–
ESSERC Tier 2111.00アメリカUSA #29 · 世界World #101

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    MarginCiM: A 1.22 PetaOps/W, 2.5GS/s, 2.5pJ/correlation Margin-Processing Compute-in-Memory Array for RF to Feature Conversion
    DOI
    K. Rashed, A. Undavalli, S. Chakrabartty, A. Nagulu, A. Natarajan
    Oregon State University · Northeastern University · Washington University in St. Louis
  2. ISSCC
    2026
    32.2 A PVT-Robust Frequency-Scalable Fully Dynamic ΔΣ ADC with Bottom-Plate Level Shift
    DOI
    Tohru Kaneko, Hideaki Ishida, Yuzuru Yamaki, Satoshi Takehara, Un-Ku Moon
    旭化成エレクトロニクスAsahi Kasei Microdevices · Oregon State University
  3. ISSCC
    2026
    37.4 A 100Gb/s, 1.92pJ/b Aggregate 4-Lane Single-Ended NRZ Transceiver with 15dB Far-End Crosstalk Cancellation via On-Chip Feature Extraction and Classification in 16nm FinFET
    DOI
    Xiaohui Lin, Ramin Javadi, Bella Bose, Tejasvi Anand
    Oregon State University
  4. JSSC
    2026
    A Calibration-Free Frequency-Scalable ΔΣ ADC Incorporating PVT-Robust Dynamic Integration
    DOI
    Tohru Kaneko, Hideaki Ishida, Yuzuru Yamaki, Satoshi Takehara, Un-Ku Moon
    旭化成エレクトロニクスAsahi Kasei Microdevices · Oregon State University
  5. JSSC
    2026
    A Hybrid Voltage-Time Domain Pipelined ADC With Reference-Embedded Time-Domain Residues
    DOI
    Jae-Geun Lim, Jun-Ho Boo, Jae-Hyuk Lee, Hyoung-Jung Kim, Byeongho Yu, Kang-Il Cho, Sungho Lee, Un-Ku Moon, Gil-Cho Ahn
    Sogang University · Hankuk University of Foreign Studies · Samsung · Korea Electronics Technology Institute · Oregon State University
  6. JSSC
    2026
    A Machine Learning-Inspired PAM-4 Transceiver for Medium-Reach Wireline Links
    DOI
    Ramin Javadi, Tejasvi Anand
    Oregon State University
  7. CICC
    2025
    A 0.055pJ/bit/dB 42Gb/s PAM-4 Wireline Transceiver with Consecutive Symbol to Center (CSC) Encoding and Classification for 26dB Loss in 16nm FinFET
    DOI
    Ramin Javadi, Tejasvi Anand
    Oregon State University
  8. CICC
    2025
    A 16 GΩ Input Impedance Amplifier with Flicker Noise Reduction for Neural Recording Applications
    DOI
    Jyotindra Shakya, Gabor Temes, Faraz Adin
    Oregon State University
  9. ISSCC
    2025
    A 4GS/s Fully Analog 256×256 MP-Based Cross-Correlator with 1000TOPS/W Compute Efficiency and 1.3TOPS/mm2 Compute Density in 22nm SOI CMOS
    DOI
    Aswin Undavalli, Kareem Rashed, Gert Cauwenberghs, Shantanu Chakrabartty, Arun Natarajan, Aravind Nagulu
    Washington University in St. Louis · Oregon State University · University of California San Diego
  10. JSSC
    2025
    Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation
    DOI
    Aswin Undavalli, Kareem Rashed, Abdul Rakib Hossain, Gert Cauwenberghs, Shantanu Chakrabartty, Arun Natarajan, Aravind Nagulu
    Northeastern University · Oregon State University · Washington University in St. Louis · University of California San Diego
  11. VLSI
    2025
    A 3.2pJ/b 0.068pJ/b/dB 25Gb/s NRZ Wireline Transceiver with 3-Tap FFE and Random Forest Classification for Compensating 47dB Loss in 16nm FinFET
    DOI
    Ramin Javadi, Xiaohui Lin, Tejasvi Anand
    Oregon State University
  12. ESSERC
    2024
    A 4-Channel 60Gb/s Aggregate & 0.167pJ/bit/dB Transceiver Achieving 33% Higher Pin-Efficiency Over Differential Using 4b6w Balanced Coding
    DOI
    Xiaohui Lin, Mohamed Megahed, Bella Bose, Tejasvi Anand
    Oregon State University
  13. ISSCC
    2024
    12.3 A Scalable and Instantaneously Wideband 5GS/s RF Correlator Based on Charge Thresholding Achieving 8-bit ENOB and 152 TOPS/W Compute Efficiency
    DOI
    Kareem Rashed, Aswin Undavalli, Shantanu Chakrabartty, Aravind Nagulu, Arun Natarajan
    Oregon State University · Washington University in St. Louis
  14. JSSC
    2024
    A Low-Noise Dual-Path Self-Interference Cancellation Architecture for Watt-Level TX Power Handling in Simultaneous Transmit and Receive
    DOI
    Mostafa Essawy, Kareem Rashed, Amin Aghighi, Arun S. Natarajan
    Oregon State University
  15. JSSC
    2024
    A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing
    DOI
    Kareem Rashed, Aswin Undavalli, Shantanu Chakrabartty, Aravind Nagulu, Arun Natarajan
    Oregon State University · Washington University in St. Louis
  16. JSSC
    2024
    An SNR-Enhanced 8-Ary (SNRE-8) Modulation Technique for Wireline Transceivers Using Pulse Width, Position, and Amplitude Modulation
    DOI
    Mohamed Megahed, Yusang Chun, Zhiping Wang, Tejasvi Anand
    Oregon State University
  17. JSSC
    2024
    Full-Duplex Receiver With Wideband, High-Power RF Self-Interference Cancellation Based on Capacitor Stacking in Switched-Capacitor Delay Lines
    DOI
    Sasank Garikapati, Aravind Nagulu, Igor Kadota, Mostafa Essawy, Tingjun Chen, Shibo Wang, Tanvi Pande, Arun S. Natarajan, Gil Zussman, Harish Krishnaswamy
    Columbia University · Washington University in St. Louis · Northwestern University · Oregon State University · Duke University
  18. ISSCC
    2023
    10.4 A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting
    DOI
    Manxin Li, Calvin Yoji Lee, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon
    Oregon State University · 旭化成エレクトロニクスAsahi Kasei Microdevices
  19. ISSCC
    2023
    31.8 A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving −85dBm/100kb/s Sensitivity, −41dB SIR and 174dB RX FoM in 22nm CMOS
    DOI
    Hayden Bialek, Matthew Johnston, Arun Natarajan
    Oregon State University
  20. JSSC
    2023
    A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios
    DOI
    Hayden Bialek, Matthew L. Johnston, Arun Natarajan
    Oregon State University
  21. JSSC
    2023
    A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting
    DOI
    Manxin Li, Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon
    Oregon State University · 旭化成エレクトロニクスAsahi Kasei Microdevices
  22. JSSC
    2023
    A Sub-μW Energy Harvester Architecture With Reduced Top/Bottom Plate Switching Loss Achieving 80.66% Peak Efficiency in 180-nm CMOS
    DOI
    Mohamed Megahed, Tejasvi Anand
    Oregon State University
  23. CICC
    2022
    Switched-Capacitor Circuits
    DOI
    David J. Allstot, Un-Ku Moon, Gabor C. Temes
    Oregon State University
  24. ISSCC
    2022
    A 0.0375mm2 203.5µW 108.8dB DR DT Single-Loop DSM Audio ADC Using a Single-Ended Ring-Amplifier-Based Integrator in 180nm CMOS
    DOI
    Calvin Yoji Lee, Un-Ku Moon
    Oregon State University
  25. JSSC
    2022
    A Frequency-Locked Oscillator Using Complex RC Impedance IQ-Balancing
    DOI
    Boyu Shen, Soumya Bose, Matthew L. Johnston
    Oregon State University · Texas Instruments · Intel
  26. JSSC
    2022
    A PAM-8 Wireline Transceiver With Linearity Improvement Technique and a Time-Domain Receiver Side FFE in 65 nm CMOS
    DOI
    Yusang Chun, Mohamed Megahed, Ashwin Ramachandran, Tejasvi Anand
    Oregon State University · Texas Instruments
  27. JSSC
    2022
    A Passive Wideband Noise-Canceling Mixer-First Architecture With Shared Antenna Interface for Interferer-Tolerant Wake-Up Receivers and Low-Noise Primary Receivers
    DOI
    Hayden Bialek, Ali Binaie, Sohail Ahasan, Kamala Raghavan Sadagopan, Matthew L. Johnston, Harish Krishnaswamy, Arun Natarajan
    Oregon State University · Columbia University
  28. VLSI
    2022
    A Single-Clock-Phase Sense Amplifier Architecture with 9x Smaller Clock-to-Q Delay Compared to the StrongARM & 6.3dB Lower Noise Compared to Double-Tail
    DOI
    Xiaohui Lin, Mohamed Megahed, Tejasvi Anand
    Oregon State University