TopSSCS
← Pohang University of Science and Technology

VLSI · 2022–2026 LIVE

Pohang University of Science and Technology

対象論文Papers 16 · 筆頭著者first author 15 · 著者按分fractional 12.92 · 韓国Korea #3 · 世界World #9

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Jae-Yoon Sim ORCID11
2Heesung Roh ORCID3
2Jong-Hun Kim ORCID3
2Min-Sik Kim3
2Mun-Jung Cho ORCID3
2Myeong-Ho Kim3
2Se-Un Shin ORCID3
2Yeon-Woo Jeong ORCID3
9ByungJun Kim2
9Kyu-Jin Choi2
9Seon-Kyoo Lee ORCID2
9Seung-Ju Lee ORCID2
9Youngjoo Lee ORCID2
14Dong-Chan Lee1
14Donggyu Minn ORCID1
14Dongjun Park ORCID1
14Dongyun Kam1
14Eun-Jae Ko1
14Geon Kim1
14Goeun Baek1
14HanGyeol Mun ORCID1
14Ho-Jin Song ORCID1
14Hyuncheol Park ORCID1
14In-Hye Hur1
14Jaehan Park ORCID1
14Jaeho Lee ORCID1
14Jaehoon Lee1
14Jaehyun Park1
14Jaeyeong Kim ORCID1
14Jeongwon Choe ORCID1
14Jongmi Lee1
14Kangseop Lee1
14Kyongsu Lee ORCID1
14Min-Gyu Jeong1
14Minki Lee1
14Moonjoo Lee1
14Seong-Ju Lee1
14Seunghun Bae1
14Seunghyun Moon ORCID1
14Yeji Min1

対象論文Papers

  1. VLSI
    2026
    A 6.78MHz Fractional-Resonance Full-Wave Current-Mode Wireless Receiver with Real-Time SAR-Based Optimum Tracking and Power-Aware Division Control
    DOI
    Jong-Hun Kim, Seong-Ju Lee, Seogyong Jeong, Mun-Jung Cho, Yeon-Woo Jeong, Min-Sik Kim, Myeong-Ho Kim, Dong-Chan Lee, Min-Gyu Jeong, Geon Kim, In-Hye Hur, Eun-Jae Ko, Se-Un Shin
    Pohang University of Science and Technology · Samsung
  2. VLSI
    2026
    A Floating-Inverter Integrator LDO Achieving Near-Zero Line Regulation via Parasitic-Synthesized Supply-Tracking Offset
    DOI
    Jaehoon Lee, Yeji Min, Jae-Yoon Sim
    Samsung · Pohang University of Science and Technology
  3. VLSI
    2025
    A 1.7 pJ/bit 10 MHz Calibration-Free PVT Variation and Mismatch Tolerant Latch-Based True Random Number Generator in 4 nm FinFET
    DOI
    Jaehoon Lee, Jongmi Lee, Yelim Youn, Yong Lim, Dongyeon Hong, Bogyeong Kang, Sangmin Yoo, Jae-Yoon Sim
    Pohang University of Science and Technology · Samsung
  4. VLSI
    2025
    A 10.42μW/Ch. PPG Sensor with a Zoomed Sampling Based on Velocity of Blood Flow
    DOI
    Kyu-Jin Choi, ByungJun Kim, Jae-Yoon Sim
    Pohang University of Science and Technology
  5. VLSI
    2025
    A 90–260 $\mathrm{V}_{\text{AC}}$ Isolated Offline Single-Stage Single-Transformer-Winding Multiple-Output (STWMO) RGBW LED Driver with <0.7% Current Variation and Dimmable Current-Regulated Error-Based Control
    DOI
    Mun-Jung Cho, Changsik Shin, Seung-Ju Lee, Jong-Hun Kim, Yeon-Woo Jeong, Min-Sik Kim, Myeong-Ho Kim, Hyuntak Jeon, Se-Un Shin
    Pohang University of Science and Technology · Samsung · Chungbuk National University · Jeonbuk National University
  6. VLSI
    2025
    A 94.1%-Efficiency Flying-Capacitor-Shared 2-Inductor 3-Level Boost Converter with Simultaneous VCF and IL Balance Achieving <0.92%-VCF and <0.22%-IL Error
    DOI
    Seung-Ju Lee, Yeon-Woo Jeong, Jong-Hun Kim, Mun-Jung Cho, Min-Sik Kim, Myeong-Ho Kim, Se-Un Shin
    Pohang University of Science and Technology
  7. VLSI
    2025
    An 8K-Spin Ising Machine IC with Reconfigurable Many-Body Spin Interactions and Limitless Multichip Extension
    DOI
    Jaeyeong Kim, Jae-Yoon Sim
    Pohang University of Science and Technology
  8. VLSI
    2024
    A $94\text{fs}_{\text{rms}}$-Jitter and −249.3dB FoM 4.0GHz Ring-Oscillator-Based MDLL with Background Calibration of Phase Offset and Injection Slope Mismatch
    DOI
    Dongjun Park, Heesung Roh, Seon-Kyoo Lee, Jae-Yoon Sim
    Pohang University of Science and Technology
  9. VLSI
    2024
    A 246-fJ/b 13.3-Tb/s/mm Single-Ended Current-Mode Transceiver with Crosstalk Cancellation for Shield-Less Short-Reach Interconnect
    DOI
    Jaeho Lee, Kyongsu Lee, Jae-Yoon Sim, Seon-Kyoo Lee
    Pohang University of Science and Technology
  10. VLSI
    2024
    A Smart Contact Lens System with 433MHz Wireless Power and Data Transfer at a Modulation Index Down to 0.02%
    DOI
    Heesung Roh, Hyun Jin Yoo, Si-Youl Yoo, Seung Hee Pyen, Cheonhoo Jeon, Jae-Yoon Sim
    Pohang University of Science and Technology · Dankook University
  11. VLSI
    2023
    A 110dB-TCMRR TDM-based 8-Channel Noncontact ECG Recording IC with Suppression of Motion-Induced Coupling in <0.3s and CMI Cancellation up to 22VPP
    DOI
    Kyu-Jin Choi, Seungnam Choi, Jae-Yoon Sim
    Pohang University of Science and Technology · Samsung
  12. VLSI
    2023
    A 2.35 Gb/s/mm2 (7440, 6696) NB-LDPC Decoder over GF(32) using Memory-Reduced Column-Wise Trellis Min-Max Algorithm in 28nm CMOS Technology
    DOI
    Jeongwon Choe, Youngjoo Lee
    Pohang University of Science and Technology
  13. VLSI
    2023
    A 28 nm 66.8 TOPS/W Sparsity-Aware Dynamic-Precision Deep-Learning Processor
    DOI
    HanGyeol Mun, Hyunwoo Son, Seunghyun Moon, Jaehyun Park, ByungJun Kim, Jae-Yoon Sim
    Pohang University of Science and Technology · Gyeongsang National University
  14. VLSI
    2023
    A 6.5nW, -73.5dBm Sensitivity, Cryptographic Wake-Up Receiver with a PUF-based OTP and Temperature-Insensitive Code Recovery
    DOI
    Jaehan Park, Cheonhoo Jeon, Donggyu Minn, Heesung Roh, Jae-Yoon Sim
    Pohang University of Science and Technology · Samsung
  15. VLSI
    2022
    13-K Tnoise Cryo-CMOS Parametric Amplifier at 80 mK for Quantum Computers
    DOI
    Goeun Baek, Seunghun Bae, Minki Lee, Hyuncheol Park, Kangseop Lee, Jae-Yoon Sim, Moonjoo Lee, Ho-Jin Song
    Pohang University of Science and Technology
  16. VLSI
    2022
    A 1.1μs 1.56Gb/s/mm2 Cost-Efficient Large-List SCL Polar Decoder Using Fully-Reusable LLR Buffers in 28nm CMOS Technology
    DOI
    Dongyun Kam, Byeong Yong Kong, Youngjoo Lee
    Pohang University of Science and Technology · Kongju National University