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← Research Institute of Tsinghua University in Shenzhen

A-SSCC · 2022–2026 LIVE

Research Institute of Tsinghua University in Shenzhen

対象論文Papers 4 · 筆頭著者first author 1 · 著者按分fractional 0.55 · 中国China #12 · 世界World #30

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Wei Deng ORCID3
2Zhihua Wang ORCID2
3Cheng Nian1
3Fei Chen1

対象論文Papers

  1. A-SSCC
    2025
    MobileSplat: A 105 FPS 3D Gaussian Splatting Rendering FPGA Processor with Mixed Precision Computation Path and Pre-culling Architecture
    DOI
    Cheng Nian, Xiaorui Mo, Jiaqi Zhang, Jiaying Peng, Fasih Ud Din Farrukh, Liang Lu, Fei Chen, Chun Zhang
    Research Institute of Tsinghua University in Shenzhen · Tsinghua University
  2. A-SSCC
    2023
    A 11.6-to-13.6GHz, 47-fsrms Jitter Integer-N PLL with Simultaneous Differential 2ND-Harmonic Output using a - 128dBc/Hz Phase Noise at 1MHz offset Quad-Core VCO in 65nm CMOS
    DOI
    Ruichang Ma, Haikun Jia, Hongzhuo Liu, Wei Deng, Zhihua Wang, Baoyong Chi
    Tsinghua University · Research Institute of Tsinghua University in Shenzhen
  3. A-SSCC
    2022
    A Capacitor-less Digital LDO using Ripple-Frequency-Adaptive Time-domain Digital Pre-distortion Technique
    DOI
    Angxiao Yan, Wei Deng, Haikun Jia, Shiwei Zhang, Rui Wu, Zhihua Wang, Baoyong Chi
    Tsinghua University · Research Institute of Tsinghua University in Shenzhen · Chinese Academy of Sciences · Aerospace Information Research Institute
  4. A-SSCC
    2022
    A Compact Square-Geometry Quad-Core 19 GHz Class-F VCO with Parallel Inductor-sharing Technique achieving -137.2 dBc/Hz Phase Noise at 10MHz Offset
    DOI
    Yaqian Sun, Wei Deng, Haikun Jia, Zhihua Wang, Baoyong Chi
    Tsinghua University · Research Institute of Tsinghua University in Shenzhen