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VLSI · 2022–2026 LIVE

Sungkyunkwan University

対象論文Papers 14 · 筆頭著者first author 8 · 著者按分fractional 8.36 · 韓国Korea #4 · 世界World #13

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Donguk Seo ORCID4
1Jaehyuk Choi ORCID4
1Yoonmyung Lee ORCID4
4Jung-Hoon Chun ORCID3
4Taewook Kang ORCID3
6Houk Lee ORCID2
6Jaerok Kim2
6Jun-Eun Park ORCID2
6Kyungjun Lee2
10Bai-Sun Kong ORCID1
10Chanwook Hwang1
10Donggyu Kim1
10Donghyun Park1
10Heesung Lee ORCID1
10Ingu Jeong1
10Jaehyeon So1
10Jaemin Lee1
10Jeongho Kim1
10Jieun Kim1
10Jinpyo Han1
10Jonghang Choi ORCID1
10Jonghwan Ko1
10Junhee Cho1
10Junseo An1
10Kihoon Kim1
10Mingyu Kim1
10Minhyeok Jeong ORCID1
10Minkyu Ko ORCID1
10Minkyu Song1
10Seok-Won Jung1
10Seongjun Shin1
10Shin Han ORCID1
10Unbok Wi1
10Woosung Chung1
10Yongkeon Kwon1
10Yunbeom Hwang1

対象論文Papers

  1. VLSI
    2026
    A 0.33 pJ/b Differential CMOS Thyristor-Based TRNG with PVT Tolerance and LSB Min-Entropy Preservation in 28nm Process
    DOI
    Jaerok Kim, Donguk Seo, Yoonmyung Lee
    Sungkyunkwan University
  2. VLSI
    2026
    A 0.511 pJ/Bit Data-Independent and Post-Processing-Free 6T-SRAM-Based TRNG Exploiting Differential Bit-Line Leakage
    DOI
    Jeongho Kim, Donghyun Park, Hyeri Kang, Minhyeok Jeong, Donguk Seo, Kyungjun Lee, Yoonmyung Lee
    Sungkyunkwan University · LG · LG
  3. VLSI
    2026
    A 16 Mb 28 nm FD-SOI STT-MRAM Achieving 2.0 ns Read Access Time at 0.9 V via a PVT-Variation-Tolerant Dual-Reference Sensing Scheme
    DOI
    Donguk Seo, Youjin Choi, Mingyu Kim, Heeyeon Kim, Kyungjun Lee, Jaerok Kim, Donggyu Kim, Shin Han, Yoonmyung Lee
    Sungkyunkwan University · Samsung
  4. VLSI
    2026
    A 20T Low-Power Single-Phase Full-Static Contention-Free Flip-Flop with Interlatch Transistor Sharing
    DOI
    Minkyu Ko, Bomin Joo, Byeonggon Kang, Unbok Wi, Jieun Kim, Dalhee Lee, Changbeom Kim, Hayoung Kim, Sanghoon Baek, Bai-Sun Kong
    Sungkyunkwan University · Samsung · University of California San Diego
  5. VLSI
    2026
    A Fully Integrated, GBW-Enhanced Tri-Loop, Maximum Ripple Rejection Tracking Analog LDO Achieving Better Than −25.5dB PSR Up to 1GHz and 13ns Settling Time
    DOI
    Yunbeom Hwang, Yongkeon Kwon, Minkyu Song, Seongjun Shin, Junseo An, Jun-Eun Park
    Sungkyunkwan University
  6. VLSI
    2026
    All-Digital Event-Based Vision Sensor with Scene Adaptive Power-Saving Pixels and Three-Layer Neural Network for Object Detection
    DOI
    Houk Lee, Jaehyeon So, Chanwook Hwang, Woosung Chung, Kihoon Kim, Jaemin Lee, Jonghwan Ko, Jaehyuk Choi
    Sungkyunkwan University
  7. VLSI
    2025
    128-Channel Multi-Chip Acoustic Hologram Generator
    DOI
    John Kustin, Taewook Kang, Seungheun Song, Yahya Naveed, Michael P. Flynn
    University of Michigan · Sungkyunkwan University
  8. VLSI
    2025
    A Calibration-Free 175MHz Bandwidth 60dB SNDR 6th-Order Bandpass Cascaded Time-Interleaved Noise-Shaping SAR ADC with Optimum Zero Placement
    DOI
    Zhiyuan Zhao, Hsiang-Wen Chen, Seungheun Song, Taewook Kang, Michael Flynn
    University of Michigan · Sungkyunkwan University
  9. VLSI
    2025
    An NS-SAR Quantizer-Based Pipeline Incremental Delta-Sigma ADC Using a Current-Regulated Floating Ring Amplifier and Two-Phase Miller Negative-C
    DOI
    Seungheun Song, Taewook Kang, Alexander Knowlton, Seungjong Lee, Michael P. Flynn
    University of Michigan · Sungkyunkwan University
  10. VLSI
    2024
    A 92.8% Power Reduction Event-Driven Dual-Mode Touch Analog Front-End IC Featuring 620μW Self-Capacitance Sensing and 500fps Mutual-Capacitance Sensing
    DOI
    Jonghang Choi, Ingu Jeong, Seok-Won Jung, Jun-Eun Park
    Sungkyunkwan University
  11. VLSI
    2024
    A Digital Dynamic Vision Sensor with SPAD Pixels and Multi-Event Generation for Motion/Vibration-Adaptive Detection
    DOI
    Jinpyo Han, Houk Lee, Junhee Cho, Heesung Lee, Seong-Jin Kim, Jung-Hoon Chun, Jaehyuk Choi
    Sungkyunkwan University · Ulsan National Institute of Science and Technology
  12. VLSI
    2024
    A uW Output Power, >100V, Single-Capacitor Switched DC-DC Up/Down Converter
    DOI
    Rohit Rothe, Jungho Lee, Zichen Fan, Li-Yu Chen, Donguk Seo, Yoonmyung Lee, Dennis Sylvester, David Blaauw
    University of Michigan · Sungkyunkwan University
  13. VLSI
    2022
    A 100×80 CMOS Flash LiDAR Sensor with 0.0011mm2 In-Pixel Histogramming TDC Based on Analog Counter and Self-Calibrated Single-Slope ADC
    DOI
    Su-Hyun Han, Bumjun Kim, Seonghyeok Park, Yongjae Park, Jung-Hoon Chun, Jaehyuk Choi, Seong-Jin Kim
    Ulsan National Institute of Science and Technology · Sungkyunkwan University
  14. VLSI
    2022
    A 640×480 Indirect Time-of-Flight Image Sensor with Tetra Pixel Architecture for Tap Mismatch Calibration and Motion Artifact Suppression
    DOI
    Jubin Kang, Yongjae Park, Jung-Hye Hwang, Jung-Hoon Chun, Jaehyuk Choi, Seong-Jin Kim
    Ulsan National Institute of Science and Technology · Sungkyunkwan University