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大学University · アメリカUSA · 2022–2026 LIVE

Georgia Institute of Technology

アメリカUSA 4位 (54 pt) · 世界World 25位 (0 pt) · 対象論文Papers 77

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

05101520252022 ISSCC: 52022 VLSI: 22022 JSSC: 92022 CICC: 52022 ESSERC: 22320222023 ISSCC: 32023 VLSI: 22023 JSSC: 62023 CICC: 12023 ESSERC: 21420232024 ISSCC: 32024 VLSI: 22024 JSSC: 22024 CICC: 31020242025 ISSCC: 32025 JSSC: 42025 CICC: 52025 A-SSCC: 12025 ESSERC: 41720252026 VLSI: 42026 JSSC: 82026 CICC: 1132026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC5333–
VLSI222–4
JSSC96248
CICC51351
A-SSCC–––1–
ESSERC22–4–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 114118.50アメリカUSA #4 · 世界World #22
VLSI Tier 11076.73アメリカUSA #4 · 世界World #20
JSSC Tier 1292117.37アメリカUSA #4 · 世界World #23
CICC Tier 2151211.42アメリカUSA #2 · 世界World #13
A-SSCC Tier 2111.00アメリカUSA #7 · 世界World #71
ESSERC Tier 2876.41アメリカUSA #4 · 世界World #18

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    A 92.5 TOPS/W Fully-Analog Multi-Layer Computing-in-Memory for State-Space Models in 28nm CMOS
    DOI
    Laith A. Shamieh, Wei-Chun Wang, Narasimha Kidambi, Saibal Mukhopadhyay
    Georgia Institute of Technology
  2. JSSC
    2026
    0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis
    DOI
    Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Yuhao Yuan, Qun Jane Gu
    Georgia Institute of Technology · NVIDIA · University of California, Davis
  3. JSSC
    2026
    A 136.6-dB-DR 174.3-dB-FoM S Versatile Current-to-Digital Converter With a Truncated-Noise-Shaped Baseline-Servo-Loop
    DOI
    Taeryoung Seol, Sehwan Lee, Geunha Kim, Samhwan Kim, Yeonjae Shin, Jeongyoon Wie, Seungyeob Baik, Hongki Kang, Minyoung Song, Jong-Hyeok Yoon, Junghyup Lee
    Georgia Institute of Technology · Samsung · Daegu Gyeongbuk Institute of Science and Technology · Korea Institute of Nuclear Safety · Seoul National University
  4. JSSC
    2026
    A 32-Channel 85.4 dB SNDR Time-Multiplexed Neural Recording Front-End Achieving Within-Conversion Artifact Recovery
    DOI
    Arindam Mandal, Chi-Hsiang Huang, Julian Arenas, Wei-En Lee, Kevin D. Patino-Sosa, Philip Anschutz, Amanda Jacob, Keshav Ramachandra, Samuel Sober, Muhannad S. Bakir, Shaolan Li, Visvesh S. Sathe
    NVIDIA · Intel · Georgia Institute of Technology · Emory University
  5. JSSC
    2026
    A 40-nm Programmable Heterogeneous SoC With 5.625/0.85 MB RRAM/SRAM for Accelerating Neuro-Symbolic AI Models
    DOI
    Che-Kai Liu, Zishen Wan, Young-Seok Noh, Mohamed Ibrahim, Samuel D. Spetalnick, Tushar Krishna, Win-San Khwa, Ashwin Sanjay Lele, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC · TSMC
  6. JSSC
    2026
    A 92.1-dB SNDR Easy-Driving Two-Step NS-SAR-Based Incremental ADC With Concurrent Gain-Error Plus Noise Suppression
    DOI
    Chenyang Li, Tzu-Han Wang, Dongsuk Kang, Ken Li, Xitie Zhang, Wei-En Lee, Visvesh S. Sathe, Shaolan Li
    Georgia Institute of Technology
  7. JSSC
    2026
    A 95.9-dB SNDR 10-kHz BW Third-Order VCO-Based CT ΔΣ Modulator Using a Phase-Time Two-Step Quantizer
    DOI
    Ken Li, Wei-En Lee, Xitie Zhang, Tian Xie, Tzu-Han Wang, Visvesh S. Sathe, Shaolan Li
    Georgia Institute of Technology
  8. JSSC
    2026
    A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd -Temperature Sensor for SoC Thermal Management
    DOI
    Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh S. Sathe
    Georgia Institute of Technology · Intel
  9. JSSC
    2026
    A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer
    DOI
    Zhengqi Xu, Zhiyuan Zhao, Michael A. Laun, Coleman DeLude, Justin Romberg, Michael P. Flynn
    University of Michigan · Georgia Institute of Technology
  10. VLSI
    2026
    A 1V Time-Division-Multiplexed 4-Channel 3 ${ }^{\text{rd}}$-Order NS-SAR ADC with 178.8dB FoM $\mathrm{M}_{\text{DR}}$ and $\text{5.8G} {\Omega}$ Input Impedance for Wearable Dry-Contact Biopotentials
    DOI
    Geunha Kim, Sehwan Lee, Taeryoung Seol, Kyuhyeon Park, Jeongyoon Wie, Minoo Lee, Seokhan Jeong, Yeonjae Shin, Sangkyu Lee, Byeongwoo Koo, Michael Choi, Junghyup Lee
    Daegu Gyeongbuk Institute of Science and Technology · Samsung · Georgia Institute of Technology
  11. VLSI
    2026
    An 8-Element 200-MHz Bandwidth Oversampling Digital Slepian Beamformer
    DOI
    Zhengqi Xu, Zhiyuan Zhao, Coleman DeLude, Justin Romberg, Michael Flynn
    University of Michigan · Georgia Institute of Technology
  12. VLSI
    2026
    Event-Gaze: A 28nm 441μs-Latency 12.88mW SoC for Sparse-Event-Based Dynamic Eye Tracking and Gaze Estimation in XR
    DOI
    Nealson Li, Che-Kai Liu, Zachary J. Ellis, Connor Talley, Young-Seok Noh, Kevin Patino-Sosa, Visvesh Sathe, Arijit Raychowdhury
    Georgia Institute of Technology
  13. VLSI
    2026
    Unified Digital Thermal-Voltage Sensor for Thermal Management in Intel 18A/Intel 3
    DOI
    Shanshan Xie, Gregory K. Chen, Phil C. Knag, Hikmet Seha Ozturk, Visvesh S. Sathe, Carlos Tokunaga, James W. Tschanz
    Intel · Georgia Institute of Technology
  14. A-SSCC
    2025
    A 28 nm 1.80Mb/mm 2 Digital/Analog Hybrid SRAM-CIM Macro using 2D-Weighted Capacitor Array for Complex Number MAC Operations
    DOI
    Shota Konno, Che-Kai Liu, Sigang Ryu, Samuel Spetalnick, Arijit Raychowdhury
    Georgia Institute of Technology
  15. CICC
    2025
    A 0.14µJ Per-Acquisition Frequency Domain GPS Correlator Using Adaptive Compressive Sampling
    DOI
    Jung-Jin Park, Julian Arenas, Kevin Patino-Sosa, Visvesh Sathe
    Georgia Institute of Technology
  16. CICC
    2025
    A 32-Channel 85.4dB SNDR Time-multiplexed Neural Recording Frontend Achieving Within-Conversion Artifact Recovery
    DOI
    Arindam Mandal, Chi-Hsiang Huang, Julian Arenas, Wei-En Lee, Philip Anschutz, Amanda Jacob, Keshav Ramachandra, Samuel Sober, Muhannad Bakir, Shaolan Li, Visvesh Sathe
    Georgia Institute of Technology · Emory University
  17. CICC
    2025
    A 50-kHz BW 92.1-dB SNDR Incremental ADC Using a Back-End Sampling Two-Step NS-SAR Architecture with Concurrent Gain-Error + Noise Suppression
    DOI
    Tzu-Han Wang, Chenyang Li, Dong Suk Kang, Ken Li, Xitie Zhang, Wei-En Lee, Visvesh Sathe, Shaolan Li
    Georgia Institute of Technology
  18. CICC
    2025
    A 95.9-dB SNDR 10-kHz BW 3rd-Order VCO-Based CT ΔΣ Modulator Using a Phase-Time Two-Step Quantizer
    DOI
    Ken Li, Wei-En Lee, Xitie Zhang, Tian Xie, Tzu-Han Wang, Visvesh Sathe, Shaolan Li
    Georgia Institute of Technology
  19. CICC
    2025
    D-Band Dicke Switch Based Passive Imager with 0.13K NETD in 28nm CMOS Technology
    DOI
    Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Jane Gu
    Georgia Institute of Technology · NVIDIA · University of California, Davis
  20. ESSERC
    2025
    A 0.193A/mm 3 89.8% 24V-1V Dual-path Hybrid Dickson Converter with Fully Integrated Dynamic Charge Transfer Bootstrapped Gate Drivers
    DOI
    Hua Chen, Young-Seok Noh, Minxiang Gong, Arijit Raychowdhury
    Georgia Institute of Technology · Intel
  21. ESSERC
    2025
    A 2.5 GS/s 7.4 ENOB 6.8 mW VD-TD ADC with RC-Based Time-Residue Processing
    DOI
    Dong Suk Kang, Ken Li, Tzu Han Wang, Shaolan Li
    Georgia Institute of Technology
  22. ESSERC
    2025
    An Active Quasi-Circulator IC with Source-Follower DAC for 1-255 MHz Spectroscopic Impedance Plethysmography
    DOI
    Sharisse Poff, Nicholas E. Allen, Jacob Anderson, Yi-Kai Wu, Benjamin Boyack, Chuan-Tai Chou, Armin Tajalli, Karl F. Warnick, David V. Anderson, Chia-Hung Chen, Marcus Julian, Robert C. Davis, Shiuh-hua Wood Chiang
    Brigham Young University · National Taiwan University · National Yang Ming Chiao Tung University · University of Utah · Georgia Institute of Technology
  23. ESSERC
    2025
    Total Energy Minimization of Duty-Cycled, Multi-$V_{\text{dd}}$ SoCs with Execution-Time Guarantees
    DOI
    Chi-Hsiang Huang, Kevin Patiño Sosa, Arindam Mandal, Julian Arenas, Diego Peña-Colaiocco, Visvesh S. Sathe
    Georgia Institute of Technology
  24. ISSCC
    2025
    8.7 A Dual VDD-Temperature Sensor Employing Sensor Fusion with 2.4°C, 9mV (±3σ) Inaccuracy in 65nm CMOS
    DOI
    Hikmet Seha Ozturk, Julian Arenas, Carlos Tokunaga, Nasser Kurd, Visvesh Sathe
    Georgia Institute of Technology · Intel
  25. ISSCC
    2025
    A 17.7-to-29.5GHz Transceiver Front-End with 3.3dB NF and 20.2dBm OP1dB in 65nm CMOS
    DOI
    Botao Yang, Nayu Li, Yiwei Liu, Hang Lu, Huiyan Gao, Shaogang Wang, Jingwen Xu, Xuanyu He, Na Yan, Qun Jane Gu, Chunyi Song, Zhiwei Xu
    Zhejiang University · Fudan University · Georgia Institute of Technology
  26. ISSCC
    2025
    A Dynamically Reconfigurable Digital-Integrated Voltage-Regulator Fabric for Energy-Efficient DVFS in Multi-Domain soCs
    DOI
    Julian Arenas, Chi-Hsiang Huang, Kevin Patino-Sosa, Jung-Jin Park, Hikmet Seha Ozturk, Visvesh Sathe
    Georgia Institute of Technology
  27. JSSC
    2025
    A 22 nm Floating-Point ReRAM Compute-in-Memory Macro Using Residue-Shared ADC for AI Edge Device
    DOI
    Hung-Hsi Hsu, Tai-Hao Wen, Win-San Khwa, Wei-Hsing Huang, Zhao-En Ke, Yu-Hsiang Chin, Hua-Jin Wen, Yu-Chen Chang, Wei-Ting Hsu, Ashwin Sanjay Lele, Bo Zhang, Ping-Sheng Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shih-Hsin Teng, Chung-Cheng Chou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang
    National Tsing Hua University · TSMC · Georgia Institute of Technology · TSMC
  28. JSSC
    2025
    A 27–39-GHz VSWR-Resilient Compact True Power and Gain Sensor With Built-In Sensing Error Compensation for Integrated Power Amplifiers
    DOI
    Edward Liu, David Munzer, Jeongseok Lee, Jianping Zeng, Hua Wang
    ETH Zurich · Georgia Institute of Technology · Samsung
  29. JSSC
    2025
    A 4 × 32 Gb/s 1.8 pJ/bit Collaborative Baud-Rate CDR With Background Eye-Climbing Algorithm and Low-Power Global Clock Distribution
    DOI
    Jihee Kim, Jia Park, Jiwon Shin, Hanseok Kim, Kahyun Kim, Haengbeom Shin, Ha-Jung Park, Woo-Seok Choi
    Seoul National University · Georgia Institute of Technology
  30. JSSC
    2025
    An Edge Accelerator With 5 MB of 0.256-pJ/bit Embedded RRAM and a Localization Solver for Bristle Robot Surveillance
    DOI
    Samuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC · Korea Aerospace University · Daegu Gyeongbuk Institute of Science and Technology
  31. CICC
    2024
    A 65nm and 130nm CMOS Programmable Analog Standard Cell Library for Scalable System Synthesis
    DOI
    Pranav Mathews, Praveen Raj Ayyappan, Afolabi Ige, Swagat Bhattacharyya, Linhao Yang, Jennifer Hasler
    Georgia Institute of Technology
  32. CICC
    2024
    A Mm-Wave Phase-Time Co-Apertured Transceiver Array with Beam Squinting Mitigation for Wideband Beamforming/Spatial-Nulling
    DOI
    Mohamed Eleraky, Jeongsoo Park, Basem Abdelaziz Abdelmagid, Naga Sasikanth Mannem, Hua Wang
    ETH Zurich · Georgia Institute of Technology
  33. CICC
    2024
    An 82dB-SNDR Input-Driving-Relaxed Noise-Shaping SAR with Amplifier-Reused In-Loop Buffering and NTF Leakage Reshaping
    DOI
    Tian Xie, Ken Li, Tzu-Han Wang, Wei-En Lee, Engin Esen, Dong Suk Kang, Shaolan Li
    Georgia Institute of Technology
  34. ISSCC
    2024
    30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance
    DOI
    Samuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC · Daegu Gyeongbuk Institute of Science and Technology
  35. ISSCC
    2024
    32.10 A Compact Broadband VSWR-Resilient True-Power-and-Gain Sensor with Dynamic-Range Compensation for Phased-Array Applications
    DOI
    Edward Liu, David Munzer, Jeongseok Lee, Hua Wang
    ETH Zurich · Georgia Institute of Technology
  36. ISSCC
    2024
    32.9 An Ultra-Compact 28GHz Doherty Power Amplifier with an Asymmetrically-Coupled-Transformer Output Combiner
    DOI
    Edward Liu, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  37. JSSC
    2024
    A Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Fused Frame and Event-Based Target Identification and Tracking
    DOI
    Ashwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Shota Konno, Zishen Wan, Ashwin Bhat, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC
  38. JSSC
    2024
    PRESTO: A Processing-in-Memory-Based k-SAT Solver Using Recurrent Stochastic Neural Network With Unsupervised Learning
    DOI
    Daehyun Kim, Nael Mizanur Rahman, Saibal Mukhopadhyay
    Georgia Institute of Technology
  39. VLSI
    2024
    A 28nm Approximate / Binary 6T CAM for Sequence Alignment
    DOI
    Brian Crafton, Samuel D. Spetalnick, Muya Chang, Arijit Raychowdhury
    Georgia Institute of Technology
  40. VLSI
    2024
    A 65nm Delta-Sigma ADC Based VDD-Variation-Tolerant Power-Side-Channel-Attack Monitor with Detection Capability Down to 0.25Ω
    DOI
    Shota Konno, Zachary J. Ellis, Anupam Golder, Sigang Ryu, Daniel Dinu, Avinash Varna, Sanu Mathew, Arijit Raychowdhury
    Georgia Institute of Technology · Intel
  41. CICC
    2023
    A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL workloads
    DOI
    Mustafa Ali, Indranil Chakraborty, Sakshi Choudhary, Muya Chang, Dong Eun Kim, Arijit Raychowdhury, Kaushik Roy
    Purdue University West Lafayette · Georgia Institute of Technology
  42. ESSERC
    2023
    A 1.11 mm2 Guidewire IVUS SoC with ±50°-Range Plane Wave Transmit Beamforming
    DOI
    Xitie Zhang, Evren F. Arkan, Coskun Tekes, Tzuhan Wang, F. Levent Degertekin, Shaolan Li
    Georgia Institute of Technology · Kennesaw State University
  43. ESSERC
    2023
    AFE-CIM: A Current-Domain Compute-In-Memory Macro for Analog-to-Feature Extraction
    DOI
    Sudarshan Sharma, Wei-Chun Wang, Coleman DeLude, Minah Lee, Nael Mizanur Rahman, Narasimha Vasishta Kidambi, Justin Romberg, Saibal Mukhopadhyay
    Georgia Institute of Technology
  44. ISSCC
    2023
    29.1 A 32.5mW Mixed-Signal Processing-in-Memory-Based k-SAT Solver in 65nm CMOS with 74.0% Solvability for 30-Variable 126-Clause 3-SAT Problems
    DOI
    Daehyun Kim, Nael Mizanur Rahman, Saibal Mukhopadhyay
    Georgia Institute of Technology
  45. ISSCC
    2023
    A 73.53TOPS/W 14.74TOPS Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Hybrid Frame and Event-Based Target Tracking
    DOI
    Muya Chang, Ashwin Sanjay Lele, Samuel D. Spetalnick, Brian Crafton, Shota Konno, Zishen Wan, Ashwin Bhat, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC
  46. ISSCC
    2023
    A CMOS Multi-Functional Biosensor Array for Rapid Low-Concentration Analyte Detection with On-Chip DEP-Assisted Active Enrichment and Manipulation with No External Electrodes
    DOI
    Dongwon Lee, Doohwan Jung, Fuze Jiang, Gregory Villiam Junek, Jongseok Park, Hangxing Liu, Ying Kong, Youngin Kim, Jing Wang, Hua Wang
    ETH Zurich · Qualcomm · Georgia Institute of Technology · Apple
  47. JSSC
    2023
    A 90.4% Peak Efficiency 48-to-1-V GaN/Si Hybrid Converter With Three-Level Hybrid Dickson Topology and Gradient Descent Run-Time Optimizer
    DOI
    Minxiang Gong, Hua Chen, Xin Zhang, Rinkle Jain, Arijit Raychowdhury
    Georgia Institute of Technology · IBM · Intel
  48. JSSC
    2023
    A Reconfigurable Phase-Time Array Transmitter Achieving Keyless Secured Transmission and Multi-Receiver Localization for Low-Latency Joint Communication and Sensing
    DOI
    Naga Sasikanth Mannem, Jeongsoo Park, Elham Erfani, Edward Liu, Jeongseok Lee, Hua Wang
    Georgia Institute of Technology
  49. JSSC
    2023
    A Time-Modulated Concurrent Steerable Multibeam MIMO Receiver Array With Spectral-Spatial Mapping Using One Beamformer and Single-Wire Interface
    DOI
    Tzu-Yuan Huang, Boce Lin, Naga Sasikanth Mannem, Basem Abdelaziz, Hua Wang
    Georgia Institute of Technology
  50. JSSC
    2023
    A mm-Wave Frequency Modulated Transmitter Array for Superior Resolution in Angular Localization Supporting Low-Latency Joint Communication and Sensing
    DOI
    Naga Sasikanth Mannem, Elham Erfani, Tzu-Yuan Huang, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  51. JSSC
    2023
    Broadband mm-Wave Current/Voltage Sensing-Based VSWR-Resilient True Power/Impedance Sensor Supporting Single-Ended Antenna Interfaces
    DOI
    David Munzer, Naga Sasikanth Mannem, Jeongseok Lee, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  52. JSSC
    2023
    Regenerative Breaking: Optimal Energy Recycling for Energy Minimization in Duty-Cycled Domains
    DOI
    Chi-Hsiang Huang, Arindam Mandal, Diego Pena-Colaiocco, Edevaldo Pereira Da Silva, Visvesh S. Sathe
    University of Washington · NXP · Georgia Institute of Technology
  53. VLSI
    2023
    A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation
    DOI
    Samuel D. Spetalnick, Muya Chang, Shota Konno, Brian Crafton, Ashwin S. Lele, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC
  54. VLSI
    2023
    A 65nm 60mW Dual-Loop Adaptive Digital Beamformer with Optimized Sidelobe Cancellation and On-Chip DOA Estimation for mm-Wave Applications
    DOI
    Sigang Ryu, Adou Sangbone Assoa, Shota Konno, Arijit Raychowdhury
    Georgia Institute of Technology
  55. CICC
    2022
    A 23-37GHz Autonomous Two-Dimensional MIMO Receiver Array with Rapid Full-FoV Spatial Filtering for Unknown Interference Suppression
    DOI
    Boce Lin, Tzu-Yuan Huang, Amr Ahmed, Min-Yu Huang, Hua Wang
    Georgia Institute of Technology
  56. CICC
    2022
    A Compact Wideband Joint Bidirectional Class-G Digital Doherty Switched-Capacitor Transmitter and N-Path Quadrature Receiver through Capacitor Bank Sharing
    DOI
    Jeongseok Lee, Doohwan Jung, David Munzer, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  57. CICC
    2022
    An Analog Clock-free Compute Fabric base on Continuous-Time Dynamical System for Solving Combinatorial Optimization Problems
    DOI
    Muya Chang, Xunzhao Yin, Zoltan Toroczkai, Xiaobo Hu, Arijit Raychowdhury
    Georgia Institute of Technology · Zhejiang University · University of Notre Dame
  58. CICC
    2022
    An Energy-Efficient and Runtime-Reconfigurable FPGA-Based Accelerator for Robotic Localization Systems
    DOI
    Qiang Liu, Zishen Wan, Bo Yu, Weizhuang Liu, Shaoshan Liu, Arijit Raychowdhury
    Tianjin University · Georgia Institute of Technology
  59. CICC
    2022
    The Rise of SoC FPAA Devices
    DOI
    Jennifer Hasler
    Georgia Institute of Technology
  60. ESSERC
    2022
    A 40nm RRAM Compute-in-Memory Macro with Parallelism-Preserving ECC for Iso-Accuracy Voltage Scaling
    DOI
    Wantong Li, James Read, Hongwu Jiang, Shimeng Yu
    Georgia Institute of Technology
  61. ESSERC
    2022
    A Joint Space/Time Modulation Lens-Coupled 230-GHz Terahertz Source with 40°/43°2-D Beam Steering for Fast High-Resolution Imaging/Sensing Applications
    DOI
    Hossein Jalili, Yuqi Liu, Tzu-Yuan Huang, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  62. ISSCC
    2022
    A 26-to-39GHz Broadband Ultra-Compact High-Linearity Switchless Hybrid N/PMOS Bi-Directional PA/LNA Front-End for Multi-Band 5G Large-Scaled MIMO System
    DOI
    Jeongsoo Park, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  63. ISSCC
    2022
    A 40nm 60.64TOPS/W ECC-Capable Compute-in-Memory/Digital 2.25MB/768KB RRAM/SRAM System with Embedded Cortex M3 Microprocessor for Edge Recommendation Systems
    DOI
    Muya Chang, Samuel D. Spetalnick, Brian Crafton, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC
  64. ISSCC
    2022
    A 40nm 64kb 26.56TOPS/W 2.37Mb/mm2RRAM Binary/Compute-in-Memory Macro with 4.23x Improvement in Density and >75% Use of Sensing Dynamic Range
    DOI
    Samuel D. Spetalnick, Muya Chang, Brian Crafton, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · TSMC
  65. ISSCC
    2022
    A Broadband Mm-Wave VSWR-Resilient Joint True-Power Detector and Impedance Sensor Supporting Single-Ended Antenna Interfaces
    DOI
    David J. Munzer, Naga Sasikanth Mannem, Edgar Garay, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  66. ISSCC
    2022
    An 84dB-SNDR Low-OSR 4th-Order Noise-Shaping SAR with an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique
    DOI
    Tzuhan Wang, Tian Xie, Zhe Liu, Shaolan Li
    Georgia Institute of Technology
  67. JSSC
    2022
    A 150 GHz Lens-Free Large FoV Regenerative 2 × 2 Transceiver Array With 31% DC-to-EIRP Efficiency and −70 dBm Sensitivity for a 70 cm Bidirectional Peer-to-Peer Link
    DOI
    Edgar Felipe Garay, David Joseph Munzer, Hua Wang
    Georgia Institute of Technology
  68. JSSC
    2022
    A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer
    DOI
    Dongsuk Kang, Jae-Woo Park, Injae Park, Min-Su Park, Xuefan Jin, Kyu-Dong Hwang, Dae-Han Kwon, Jung-Hoon Chun
    Georgia Institute of Technology · Sungkyunkwan University · SK hynix
  69. JSSC
    2022
    A 25–34-GHz Eight-Element MIMO Transmitter for Keyless High Throughput Directionally Secure Communication
    DOI
    Naga Sasikanth Mannem, Tzu-Yuan Huang, Elham Erfani, Sensen Li, David Munzer, Matthieu R. Bloch, Hua Wang
    Georgia Institute of Technology
  70. JSSC
    2022
    A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding
    DOI
    Jong-Hyeok Yoon, Muya Chang, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · Daegu Gyeongbuk Institute of Science and Technology · TSMC
  71. JSSC
    2022
    A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC References
    DOI
    Wantong Li, Xiaoyu Sun, Shanshi Huang, Hongwu Jiang, Shimeng Yu
    Georgia Institute of Technology · TSMC
  72. JSSC
    2022
    A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection
    DOI
    Jong-Hyeok Yoon, Muya Chang, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury
    Georgia Institute of Technology · Daegu Gyeongbuk Institute of Science and Technology · TSMC
  73. JSSC
    2022
    A 65 nm Wireless Image SoC Supporting On-Chip DNN Optimization and Real-Time Computation-Communication Trade-Off via Actor-Critical Neuro-Controller
    DOI
    Ningyuan Cao, Baibhab Chatterjee, Jianbo Liu, Boyang Cheng, Minxiang Gong, Muya Chang, Shreyas Sen, Arijit Raychowdhury
    University of Notre Dame · Georgia Institute of Technology · Purdue University West Lafayette
  74. JSSC
    2022
    An 84-dB-SNDR Low-OSR Fourth-Order Noise-Shaping SAR With an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique
    DOI
    Tian Xie, Tzu-Han Wang, Zhe Liu, Shaolan Li
    Georgia Institute of Technology
  75. JSSC
    2022
    Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips
    DOI
    Jian-Wei Su, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Yen-Lin Chung, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Hongwu Jiang, Shanshi Huang, Sih-Han Li, Shyh-Shyuan Sheu, Chih-I Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shimeng Yu, Meng-Fan Chang
    National Tsing Hua University · Southeast University · Georgia Institute of Technology · Industrial Technology Research Institute
  76. VLSI
    2022
    A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays
    DOI
    Hongwu Jiang, Wantong Li, Shanshi Huang, Shimeng Yu
    Georgia Institute of Technology
  77. VLSI
    2022
    A 90.4% Peak Efficiency 48V/1V Three-Level Hybrid Dickson Converter with Gradient Descent Run-Time Optimizer and GaN/Si Hybrid Conversion
    DOI
    Minxiang Gong, Xin Zhang, Arijit Raychowdhury
    Georgia Institute of Technology · IBM