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大学University · 韓国Korea · 2022–2026 LIVE

Hanyang University

韓国Korea 10位 (13 pt) · 世界World 25位 (0 pt) · 対象論文Papers 32

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0510152022 ISSCC: 12022 VLSI: 12022 JSSC: 42022 ESSERC: 1720222023 ISSCC: 22023 JSSC: 2420232024 A-SSCC: 1120242025 ISSCC: 22025 VLSI: 12025 JSSC: 52025 A-SSCC: 42025 ESSERC: 21420252026 VLSI: 12026 JSSC: 562026
ISSCCVLSIJSSCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC12–2–
VLSI1––11
JSSC42–55
A-SSCC––14–
ESSERC1––2–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1532.89韓国Korea #10 · 世界World #60
VLSI Tier 1321.79韓国Korea #10 · 世界World #49
JSSC Tier 11698.88韓国Korea #8 · 世界World #42
CICC Tier 2000.00–
A-SSCC Tier 2542.79韓国Korea #6 · 世界World #26
ESSERC Tier 2300.36韓国Korea #7 · 世界World #53

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. JSSC
    2026
    A 10-bit Source-Driver IC for High-Resolution OLED-on-Silicon Displays With All-Channel Automatic Offset Calibration and Data-Aware Slew-Rate Enhancement
    DOI
    Junghwan Oh, Wiman Yoo, Dong-Kun Lee, Dong-Hyun Kim, Jong-Seok Kim
    Hanyang University
  2. JSSC
    2026
    A 108-Gb/s PAM-8 CTLE + FFE Receiver Front-End With 1.4-V ppd Input Range in 28-nm CMOS
    DOI
    Sangwan Lee, Heedo Jeong, Hanhee Jo, Hwanseok Jung, Jaeduk Han
    Hanyang University
  3. JSSC
    2026
    A 13.56-MHz Wireless Power and Synchronized Full-Duplex Data Transceiver IC Using a Single Inductive Link for Wearable Biomedical Applications
    DOI
    Junhyuck Lee, Yemin Kim, Dongrim Kim, Jaejun Kil, Woobin Hyung, Byunghun Lee
    Hanyang University
  4. JSSC
    2026
    A Compact, Highly Linear Ku -Band SiGe HBT Flip-Chip Power Amplifier Module Using a Shared Single Center-Tap Four-Way Transformer Balun With a Double-Tapped Second-Harmonic Trap
    DOI
    Byeongcheol Yoon, Yoongoo Kang, Junghyun Kim, Inchan Ju
    Hanyang University · Ajou University
  5. JSSC
    2026
    An Eight-Channel, 42-Gb/s/Channel Single-Ended PAM-4 Transmitter With a ZQ-Based FFE and PAM-4 LSB DBI Encoding for Memory Interfaces
    DOI
    Yonghwa Kwon, Geunyoung You, Yunseong Jo, Hyuntae Kim, Young Choi, Jaewoo Park, Myoungbo Kwak, Jaeduk Han
    Hanyang University · Samsung
  6. VLSI
    2026
    An 11B Source-Driver IC with Resistor-Resistor-Embedded (RRE) DAC and Multi-Step Offset Calibration Achieving 1723 µm 2 /Channel and 1.6 mV DVO for 6285-PPI OLED-On-Silicon Displays
    DOI
    Chong-Hwa Bae, Hyeon-Ho Park, Wiman Yoo, Junghwan Oh, Dong-Hyun Kim, Gang-Bae Park, Mungyu Kim, Chankeun Kwon, Dongwan Ha, Jong-Seok Kim
    Hanyang University · Samsung
  7. A-SSCC
    2025
    A 108Gb/s PAM-8 CTLE+FFE Receiver Frontend with 1.4Vppd Input Range in 28nm
    DOI
    Sangwan Lee, Hanhee Jo, Heedo Jeong, Hwanseok Jung, Jaeduk Han
    Hanyang University
  8. A-SSCC
    2025
    A 12-Channel Multi-Electrode Temporal Interference Stimulation (Multi-TIS) Driver IC with High-Voltage Amplifier and Mismatch Calibration Technique
    DOI
    Hye-Seon Choi, So-Hyun Lee, Myeong-Cheol Hyun, Jae-Ha Lee, Ji-Sun Lee, Myeong-Jun Kim, Kyunghyun Jo, Seongjun Park, Jong-Seok Kim
    Hanyang University · Korea Advanced Institute of Science and Technology · Seoul National University
  9. A-SSCC
    2025
    A 22Gb/s-54Gb/s Reconfigurable PAM-2/4/8 DSP-based Transmitter with 14-tap Feedforward Equalization
    DOI
    Seung-Mo Jin, Dong-Ho Kim, Kwang-Ho Lee, Haram Ju, Gyu-Seob Jeong, Woorham Bae, Jaeduk Han, Min-Seong Choo
    Hanyang University · Korea Electronics Technology Institute · Ayar Labs (United States)
  10. A-SSCC
    2025
    Critical-Timing-Relaxed pre-Decision Feedforward Equalizer for High-Speed DSP-based Wireline Receiver using Hardware-in-the-Loop Verification on RF-SoC
    DOI
    Sang-Hyeon Ok, Jae-Geon Lee, Kwang-Ho Lee, Haram Ju, Gyu-Seob Jeong, Woorham Bae, Min-Seong Choo
    Hanyang University · Korea Electronics Technology Institute · Ayar Labs (United States)
  11. ESSERC
    2025
    A 12-to-20Gb/s, 2.93-pJ/Bit Jitter-Filtering Retimer with High Input Jitter Tolerance in 28nm CMOS
    DOI
    Inhyun Kim, Hyeonseok Lee, Ankur Kumar, Mingi Yeo, David Dolt, Taeyang Sim, Seongkwan Lee, Cheolmin Park, Minho Kang, Jun Yeon Won, Jaemoo Choi, Jaeduk Han, Samuel Palermo
    Texas A&M University · Samsung · Hanyang University
  12. ESSERC
    2025
    A 6.0 TOPS/W Reconfigurable AI-Based Channel State Information Compression Using Delta Encoding in Multi-Receiver Mobile Systems
    DOI
    Hana Kim, Zihan Xia, Yuchan Li, Suraj P N, Rishabh Kumar, Pranav Raj, Hyunseok Lee, Junho Lee, Jiyong Yoon, Jungwon Lee, Ji-Hoon Kim, Mingu Kang
    University of California San Diego · Samsung · Hanyang University
  13. ISSCC
    2025
    22.4 A 32-to-50Gb/s/pin Single-Ended PAM-4 Transmitter with a ZQ-Based FFE and PAM-4 LSB DBI-DC Encoding
    DOI
    Yunseong Jo, Hyuntae Kim, Young Choi, Jaewoo Park, Myoungbo Kwak, Jaeduk Han
    Hanyang University · Samsung
  14. ISSCC
    2025
    6.7 A 10b Source-Driver IC with All-Channel Automatic Offset Calibration and Slew-Rate-Enhanced Amplifier Achieving 2273pm2/Channel and 1.9mV DVO for 6285-PPI OLED-on-Silicon Displays
    DOI
    Junghwan Oh, Wiman Yoo, Dong-Kun Lee, Jong-Seok Kim
    Hanyang University
  15. JSSC
    2025
    100–112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3 + 1 Hybrid FFE Taps in 40-nm Technology
    DOI
    Eunji Song, Jeonghyu Yang, Youngmin Oh, Seungwook Hong, Dongjun Lee, Sangwan Lee, Hyunwoo Im, Taeho Shin, Jaeduk Han
    SK Group (United States) · SK hynix · Hanyang University · Samsung
  16. JSSC
    2025
    A 0.5–1-V Time-Voltage Hybrid Domain Dual- Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm
    DOI
    Jun-Hwan Jang, Hui-Dong Gwon, Sungmin Yoo, Jun-Hyeok Yang, Byong-Deok Choi
    Hanyang University · Samsung
  17. JSSC
    2025
    A 14-to-32-Gb/s Deadzone-Free Referenceless CDR With Autocovariance-Based Seamless Frequency Detector in 40-nm CMOS Technology
    DOI
    Hong-Seok Choi, Jae-Geon Lee, Seung-Hwan Gong, Kwang-Ho Lee, Daehyun Koh, Jung-Woo Sull, Hyungrok Do, Chan-Ho Kye, Deog-Kyoon Jeong, Kwanseo Park, Min-Seong Choo
    SK hynix · Hanyang University · Korea Electronics Technology Institute · Samsung · Gachon University · Seoul National University · Yonsei University
  18. JSSC
    2025
    An Inductive Loading Simultaneous Noise and Input Matching Technique With Current Reuse for Low-Power LNA
    DOI
    Phuoc B. T. Huynh, Gyeong-Seok Lee, Jun-Young Park, Tae-Yeoul Yun
    Hanyang University
  19. JSSC
    2025
    Dual Polarization Dynamic Alignment of Integrated Phased Arrays
    DOI
    Geonho Park, Chul Soon Park, Tae Hwan Jang
    Korea Advanced Institute of Science and Technology · Hanyang University
  20. VLSI
    2025
    A Wireless Power and Synchronized Full-Duplex Data Transceiver IC with 400 Kbps Bidirectional Data Rate Using a Single Inductive Link for Low-Power Systems
    DOI
    Junhyuck Lee, Yemin Kim, Dongrim Kim, Dongil Kang, Minsoo Song, Byunghun Lee
    Hanyang University
  21. A-SSCC
    2024
    A 14-to-32-Gb/s Deadzone-Free Referenceless CDR with Autocovariance-based Frequency Detector in 40-nm CMOS Technology
    DOI
    Hong-Seok Choi, Jae-Geon Lee, Kwang-Ho Lee, Daehyun Koh, Jung-Woo Sull, Hyung-Rok Do, Chan-Ho Kye, Deog-Kyoon Jeong, Min-Seong Choo
    SK hynix · Hanyang University · Korea Electronics Technology Institute · Samsung · University of Suwon · Seoul National University
  22. ISSCC
    2023
    32.1 A Behind-The-Ear Patch-Type Mental Healthcare Integrated Interface with 275-Fold Input Impedance Boosting and Adaptive Multimodal Compensation Capabilities
    DOI
    Hyunjoong Kim, Myeongwoo Kim, Kwangmuk Lee, Sanghyeon Cho, Chan Sam Park, Solwoong Song, Dae Sik Keum, Dong Pyo Jang, Jae Joon Kim
    Ulsan National Institute of Science and Technology · Samsung · Hanyang University
  23. ISSCC
    2023
    6.8 A 100Gb/s 1.6Vppd PAM-8 Transmitter with High-Swing $\mathbf{3+1}$ Hybrid FFE Taps in 40nm
    DOI
    Jeonghyu Yang, Eunji Song, Seungwook Hong, Dongjun Lee, Sangwan Lee, Hyunwoo Im, Taeho Shin, Jaeduk Han
    Hanyang University
  24. JSSC
    2023
    A 325F 2 Physical Unclonable Function Based on Contact Failure Probability With Bit Error Rate < 0.43 ppm After Preselection With 0.0177% Discard Ratio
    DOI
    Duhyun Jeon, Dongmin Lee, Dong Kyue Kim, Byong-Deok Choi
    Hanyang University
  25. JSSC
    2023
    A Baseline-Tracking Single-Channel I/Q Impedance Plethysmogram IC for Neckband-Based Blood Pressure and Cardiovascular Monitoring
    DOI
    Chan Sam Park, Hyunjoong Kim, Kwangmuk Lee, Dae Sik Keum, Dong Pyo Jang, Jae Joon Kim
    Ulsan National Institute of Science and Technology · Samsung · Hanyang University
  26. ESSERC
    2022
    A −247.1 dB FoM, −77.9dBc Reference Spur Ring-Oscillator-Based Injection-Locked Clock Multiplier with Multi-Phase-Based Calibration
    DOI
    Yeonggeun Song, Kyoungjoon Ha, Han-Gon Ko, Min-Seong Choo, Deog-Kyoon Jeong
    Seoul National University · Hanyang University
  27. ISSCC
    2022
    A 145.2dB-DR Baseline-Tracking Impedance Plethysmogram IC for Neckband-Based Blood Pressure and Cardiovascular Monitoring
    DOI
    Chan Sam Park, Hyunjoong Kim, Kwangmuk Lee, Dae Sik Keum, Dong Pyo Jang, Jae Joon Kim
    Ulsan National Institute of Science and Technology · Hanyang University
  28. JSSC
    2022
    A 0.5–1 V, −68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS
    DOI
    Jun-Hwan Jang, Hui-Dong Gwon, Tae-Hwang Kong, Jun-Hyeok Yang, Byong-Deok Choi
    Hanyang University · Samsung
  29. JSSC
    2022
    A 0.9-μA Quiescent Current High PSRR Low Dropout Regulator Using a Capacitive Feed-Forward Ripple Cancellation Technique
    DOI
    Tian Guo, Woobin Kang, Jeongjin Roh
    Hanyang University
  30. JSSC
    2022
    A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
    DOI
    Sae Kyu Lee, Ankur Agrawal, Joel Silberman, Matthew Ziegler, Mingu Kang, Swagath Venkataramani, Nianzheng Cao, Bruce Fleischer, Michael Guillorn, Matthew Cohen, Silvia M. Mueller, Jinwook Oh, Martin Lutz, Jinwook Jung, Siyu Koswatta, Ching Zhou, Vidhi Zalani, Monodeep Kar, James Bonanno, Robert Casatuta, Chia-Yu Chen, Jungwook Choi, Howard Haynie, Alyssa Herbert, Radhika Jain, Kyu-Hyoun Kim, Yulong Li, Zhibin Ren, Scot Rider, Marcel Schaal, Kerstin Schelm, Michael R. Scheuermann, Xiao Sun, Hung Tran, Naigang Wang, Wei Wang, Xin Zhang, Vinay Shah, Brian Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang
    IBM · University of California San Diego · IBM · Hanyang University · IBM
  31. JSSC
    2022
    An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS
    DOI
    Zhongkai Wang, Minsoo Choi, Kyoungtae Lee, Kwanseo Park, Zhaokai Liu, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
    University of California, Berkeley · Samsung · University of California, San Francisco · Hanyang University · Delft University of Technology
  32. VLSI
    2022
    A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology
    DOI
    Zhongkai Wang, Minsoo Choi, Paul Kwon, Kyoungtae Lee, Bozhi Yin, Zhaokai Liu, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
    University of California, Berkeley · Samsung · University of California, San Francisco · Hanyang University · Delft University of Technology