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大学University · 中国China · 2022–2026 LIVE

Nanjing University

中国China 16位 (0 pt) · 世界World 25位 (0 pt) · 対象論文Papers 11

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

012342022 JSSC: 1120222023 JSSC: 1120232024 VLSI: 12024 CICC: 1220242025 ISSCC: 12025 JSSC: 2320252026 ISSCC: 22026 JSSC: 242026
ISSCCVLSIJSSCCICC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC–––12
VLSI––1––
JSSC11–22
CICC––1––

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1332.01中国China #18 · 世界World #77
VLSI Tier 1111.00中国China #15 · 世界World #78
JSSC Tier 1665.02中国China #17 · 世界World #76
CICC Tier 2100.12中国China #28 · 世界World #113
A-SSCC Tier 2000.00–
ESSERC Tier 2000.00–

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. ISSCC
    2026
    19.2 A Three-Mode Single-Inductor Four-Quadrant Converter Achieving 94.6% Peak Efficiency with Seamless Zero-Crossing
    DOI
    Peng Cao, Jiawei Xu, Zhiliang Hong
    Nanjing University · Fudan University
  2. ISSCC
    2026
    37.2 A 47.0Tb/s/mm 112Gb/s/pin PAM4 Single-Ended Transceiver Featuring 4-Aggressor Crosstalk Cancellation and Supply-Noise Tolerance for Short-Reach Memory Interfaces
    DOI
    Qian Liu, Yiheng Hui, Yuanlin Nong, He Ma, Yiwei Xu, Hao Hu, Jinpeng Zhu, Quan Wang, Lei Wang, Li Du, Yuan Du
    Nanjing University
  3. JSSC
    2026
    A 6.78-MHz Single-Stage Regulating Rectifier With Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131 mW Output Power
    DOI
    Quanrong Zhuang, Junyi Sun, Bo Li, Jie Lu, Zixu Wang, Qi'an Zhu, Xin Zhang, Yi Shi, Hao Qiu
    Nanjing University · IBM
  4. JSSC
    2026
    A Galvanic Isolator Achieving 117-Mb/s Forward Data Transfer in the Presence of 181-kV/μs Common-Mode Transient Interference
    DOI
    Jie Lu, Junyi Sun, Bo Li, Quanrong Zhuang, Yi Shi, Hao Qiu
    Nanjing University
  5. ISSCC
    2025
    9.6 A 6.78MHz Single-Stage Regulating Rectifier with Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131mW Output Power
    DOI
    Quanrong Zhuang, Junyi Sun, Bo Li, Jie Lu, Xin Zhang, Yi Shi, Hao Qiu
    Nanjing University · IBM
  6. JSSC
    2025
    A 6.78-MHz Wireless Power and Data Transfer System Achieving Simultaneous 48.6% End-to-End Efficiency and 4.0-Mb/s Forward Data Delivery With Interference-Free Rectifier
    DOI
    Quanrong Zhuang, Junyi Sun, Bo Li, Xusheng Zhang, Zixu Wang, Yi Shi, Hao Qiu
    Nanjing University
  7. JSSC
    2025
    RAC-NAF: A Reconfigurable Analog Circuitry for Nonlinear Activation Function Computation in Computing-in-Memory
    DOI
    Chenjia Xie, Zhuang Shao, Mingzhe Zhang, Yuan Du, Li Du
    Nanjing University · Ant Group (China)
  8. CICC
    2024
    An 8-14GHz 180fs-rms DTC-Less Fractional ADPLL with ADC-Based Direct Phase Digitization in 40nm CMOS
    DOI
    Yizhuo Wang, Hao Xu, Guoyu Li, Shuai Liu, Yan Liu, Rui Yin, Hui Pan, Na Yan
    Fudan University · Nanjing University
  9. VLSI
    2024
    A 6.78 MHz Wireless Power and Data Transfer System Achieving Simultaneous 52.6% End-to-End Efficiency and 4.0 Mb/s Forward Data Delivery with Interference-Free Rectifier
    DOI
    Quanrong Zhuang, Junyi Sun, Xusheng Zhang, Bo Li, Yi Shi, Hao Qiu
    Nanjing University
  10. JSSC
    2023
    A 0.90-Tb/s/in 1.29-pJ/b Wireline Transceiver With Single-Ended Crosstalk Cancellation Coding Scheme for High-Density Interconnects
    DOI
    Qian Liu, Li Du, Yuan Du
    Nanjing University
  11. JSSC
    2022
    A 6.78-MHz Multiple-Transmitter Wireless Power Transfer System With Efficiency Maximization by Adaptive Magnetic Field Adder IC
    DOI
    Hao Qiu, Takayasu Sakurai, Makoto Takamiya
    Nanjing University · 東京大学The University of Tokyo