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企業・研究機関Company / Institute · アメリカUSA · 2022–2026 LIVE

NVIDIA

アメリカUSA 4位 (36.5 pt) · 世界World 12位 (9 pt) · 対象論文Papers 41

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0510152022 VLSI: 32022 JSSC: 2520222023 ISSCC: 12023 VLSI: 12023 JSSC: 22023 CICC: 1520232024 ISSCC: 12024 JSSC: 72024 CICC: 21020242025 ISSCC: 12025 VLSI: 32025 CICC: 2620252026 ISSCC: 32026 VLSI: 32026 JSSC: 82026 CICC: 1152026
ISSCCVLSIJSSCCICC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC–1113
VLSI31–33
JSSC227–8
CICC–1221

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1665.81アメリカUSA #9 · 世界World #22
VLSI Tier 1101010.00アメリカUSA #3 · 世界World #8
JSSC Tier 11997.14アメリカUSA #4 · 世界World #11
CICC Tier 2622.72アメリカUSA #3 · 世界World #5
A-SSCC Tier 2000.00–
ESSERC Tier 2000.00–

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    A 32Gb/s/lane 0.83Tb/s/mm UCIe Compliant Die-to-Die Link Over 25mm Standard Package
    DOI
    Zhaokai Liu, Susnata Mondal, Yuanming Zhu, Sashank Krishnamurthy, Shuhei Yamada, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James Jaussi, Mozhgan Mansuri
    Intel · NVIDIA · University of California, Santa Cruz
  2. ISSCC
    2026
    17.1 NVIDIA GB10: SoC Built for AI Acceleration
    DOI
    A. Skende, G. Rosseel, N. Pinckney
    NVIDIA
  3. ISSCC
    2026
    31.9 Alpha-Vision: A Real-Time Always-on Vision Processor with 787µs Face Detection Latency in <5mW
    DOI
    Ben Keller, Rangharajan Venkatesan, Steve Dai, Jason Clemons, Matthew Fojtik, Muya Chang, Thierry Tambe, Nathaniel Pinckney, Stephen G. Tell, Qijing Huang, Shalini De Mello, Brucek Khailany
    NVIDIA · Stanford University
  4. ISSCC
    2026
    A 32 Gb/s/λ 256Gb/S/Fiber Half-Rate Bandpass-Filtered Clock-Forwarding DWDM Optical Link in a 3D-Stacked 7nm EIC/65nm PIC Technology
    DOI
    Sanquan Song, Nandish Mehta, Nikola Nedovic, Angad Rekhi, Georgios Kalogerakis, Li Xu, Brian Zimmer, Stephen G. Tell, Yoshi Nishi, Xi Chen, Ward Lopes, Benjamin G. Lee, Thomas H. Greer, C. Thomas Gray
    NVIDIA
  5. JSSC
    2026
    0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis
    DOI
    Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Yuhao Yuan, Qun Jane Gu
    Georgia Institute of Technology · NVIDIA · University of California, Davis
  6. JSSC
    2026
    A 180-nm Voltage-Controlled Magneto-Electric RAM With Sub-1-ns Switching Time
    DOI
    Haris Suhail, Haoran He, Vinod Kurian Jacob, Jiyue Yang, Kang L. Wang, Sudhakar Pamarti
    NVIDIA · TSMC · University of California, Los Angeles
  7. JSSC
    2026
    A 32-Channel 85.4 dB SNDR Time-Multiplexed Neural Recording Front-End Achieving Within-Conversion Artifact Recovery
    DOI
    Arindam Mandal, Chi-Hsiang Huang, Julian Arenas, Wei-En Lee, Kevin D. Patino-Sosa, Philip Anschutz, Amanda Jacob, Keshav Ramachandra, Samuel Sober, Muhannad S. Bakir, Shaolan Li, Visvesh S. Sathe
    NVIDIA · Intel · Georgia Institute of Technology · Emory University
  8. JSSC
    2026
    A 32-Gb/s/ λ , 256-Gb/s/Fiber Half-Rate Bandpass-Filtered Clock-Forwarding DWDM Optical Link in a 3-D-Stacked 7-nm EIC/65-nm PIC Technology
    DOI
    Sanquan Song, Nikola Nedovic, Nandish Mehta, Angad S. Rekhi, Georgios Kalogerakis, Li Xu, Brian Zimmer, Stephen G. Tell, Yoshinori Nishi, Xi Chen, Ward Lopes, Benjamin G. Lee, Thomas H. Greer, C. Thomas Gray
    NVIDIA
  9. JSSC
    2026
    A 77-fJ/bit 8-Gbps Adaptive-Voltage-Compatible Self-Timed Die-to-Die Link for 2.5-D and 3-D Interconnect in 3 nm
    DOI
    Brian Zimmer, Stephen G. Tell, C. Thomas Gray
    NVIDIA
  10. JSSC
    2026
    A Direct-Drive Monolithic O-Band Coherent Transmitter Based on Carrier-Injection Mode Mach–Zehnder Modulator
    DOI
    Antroy Roy Chowdhury, Wahid Rahman, Sunjin Choi, Ahmed ElShater, Yu-Tao Yang, Tamer Ali, Vladimir Stojanovic
    NVIDIA · MediaTek · MediaTek
  11. JSSC
    2026
    A Physically Unclonable Function With Less Than 4.16E–7 BER Featuring Secure In-Cell HCI Burn-In and nMOS-Dominant PUF Data Generation
    DOI
    Kunyang Liu, Zihan Fu, Gen Li, Hongliang Pu, Zhibo Guan, Xingyu Wang, Shufan Xu, Kiichi Niitsu, Hirofumi Shinohara
    京都大学Kyoto University · NVIDIA
  12. JSSC
    2026
    MITTA: A Multi-Task Transformer Accelerator With Mixed Precision Structured Sparsity and Hierarchical Task-Adaptive Power Management
    DOI
    Qirui Zhang, Zichen Fan, Pierre Abillama, Sara Shoouri, Jungho Lee, Chien-Wei Tseng, Changwoo Lee, Wei Meng, Hun-Seok Kim, David Blaauw, Dennis Sylvester
    University of Michigan · NVIDIA · NVIDIA
  13. VLSI
    2026
    A $\mathbf{3 2 G b} / \mathbf{s}$ Optical Receiver Utilizing a Differential TIA with $- 1 7. 3 d B m$ Sensitivity in a 3D-Stacked Silicon Photonics Platform
    DOI
    Georgios Kalogerakis, Sanquan Song, Li Xu, Nandish Mehta, Angad Rekhi, Nikola Nedovic, Benjamin G. Lee, Brian Zimmer, Steve Tell, Yoshinori Nishi, Xi Chen, Ward Lopes, Trey Greer, C. Thomas Gray
    NVIDIA
  14. VLSI
    2026
    A 0.416-pJ/b, 32-Gb/s 3D-Stacked Optical NRZ Receiver with −18.5-dBm OMA Sensitivity Using Self-Timed Decision Feedback Equalization
    DOI
    Li Xu, Sanquan Song, Nikola Nedovic, Georgios Kalogerakis, Nandish Mehta, Angad Rekhi, Brian Zimmer, Stephen G. Tell, Yoshinori Nishi, Xi Chen, Ward Lopes, Benjamin G. Lee, Thomas H. Greer, John W. Poulton, C. Thomas Gray
    NVIDIA
  15. VLSI
    2026
    Enabling the Robotic Revolution: Bridging Performance Gap Between Present and Future
    DOI
    Qijing Huang, Wenqi Jiang, Christos Kozyrakis, Jason Clemons
    NVIDIA
  16. CICC
    2025
    D-Band Dicke Switch Based Passive Imager with 0.13K NETD in 28nm CMOS Technology
    DOI
    Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Jane Gu
    Georgia Institute of Technology · NVIDIA · University of California, Davis
  17. CICC
    2025
    Key, Value, Compress: A Systematic Exploration of KV Cache Compression Techniques
    DOI
    Neusha Javidnia, Bita Darvish Rouhani, Farinaz Koushanfar
    University of California San Diego · NVIDIA
  18. ISSCC
    2025
    17.6 A 100MHz Self-Calibrating RC Oscillator Capable of Clock-Glitch Detection for Hardware Security in a 3nm FinFET Process
    DOI
    Nandish Mehta, Stephen Tell, Sanquan Song, Sudhir Kudva, Brian Zimmer, Mahmut Sinangil, C. Thomas Gray
    NVIDIA
  19. VLSI
    2025
    A 77 fJ/Bit 8 Gbps Low-Latency Self-Timed Die-to-Die Link for 2.5D and 3D Interconnect in 3nm
    DOI
    Brian Zimmer, Stephen G. Tell, C. Thomas Gray
    NVIDIA
  20. VLSI
    2025
    Innovate VLSI for AI Growth
    DOI
    John Y. Chen
    NVIDIA
  21. VLSI
    2025
    Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design
    DOI
    Chia-Tung Ho, Jing Gong, Yunsheng Bai, Chenhui Deng, Haoxing Ren, Brucek Khailany
    NVIDIA
  22. CICC
    2024
    A Distributed Power Supply Scheme with Dropout Voltage in Range 6mv-500mv and a Low Overhead Retention Mode
    DOI
    Siddharth Saxena, Sudhir Kudva, Vijay Srinivasan, Miguel Rodriguez, Walter Li, Shalimar Rasheed, Gaurav Ajwani, Tezaswi Raja, Santosh A, C. Thomas Gray
    NVIDIA
  23. CICC
    2024
    Leveraging Micro-Bump Pitch Scaling to Accelerate Interposer Link Bandwidths for Future High-Performance Compute Applications
    DOI
    Walker J. Turner, John W. Poulton, Yoshinori Nishi, Xi Chen, Brian Zimmer, Sanquan Song, John M. Wilson, William J. Dally, C. Thomas Gray
    NVIDIA
  24. ISSCC
    2024
    16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and Masking
    DOI
    Sudhir Shrikantha Kudva, Mahmut Ersin Sinangil, Stephen Tell, Nikola Nedovic, Sanquan Song, Brian Zimmer, C. Thomas Gray
    NVIDIA
  25. JSSC
    2024
    A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
    DOI
    Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray
    NVIDIA
  26. JSSC
    2024
    A Dynamic Execution Neural Network Processor for Fine-Grained Mixed-Precision Model Training Based on Online Quantization Sensitivity Analysis
    DOI
    Ruoyang Liu, Chenhan Wei, Yixiong Yang, Wenxun Wang, Binbin Yuan, Huazhong Yang, Yongpan Liu
    Tsinghua University · NVIDIA
  27. JSSC
    2024
    AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices
    DOI
    Zichen Fan, Qirui Zhang, Hyochan An, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Andrea Bejarano-Carbo, Pierre Abillama, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Hun-Seok Kim, David Blaauw, Dennis Sylvester
    University of Michigan · Apple · University of California, Santa Barbara · NVIDIA · Meta
  28. JSSC
    2024
    An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks
    DOI
    Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan
    Intel · Massachusetts Institute of Technology · Northeastern University · NVIDIA
  29. JSSC
    2024
    An Ultralow-Power Triaxial MEMS Accelerometer With High-Voltage Biasing and Electrostatic Mismatch Compensation
    DOI
    Yimai Peng, Seokhyeon Jeong, Kyojin Choo, Yejoong Kim, Li-Yu Chen, Rohit Rothe, Li Xu, Ilya Gurin, Omid Oliaei, Matthew J. Thompson, Stephen Bart, Peter Hartwell, David Blaauw, Dennis Sylvester
    University of Michigan · École Polytechnique Fédérale de Lausanne · NVIDIA
  30. JSSC
    2024
    EQZ-LDO: A Secure Digital Low Dropout Regulator Armed With Detection-Driven Protection Against Correlation Power Analysis
    DOI
    Mao Li, Jaehan Park, Sung Justin Kim, Dongkwun Kim, Sanu K. Mathew, Vivek De, Mingoo Seok
    Columbia University · NVIDIA · Apple · Intel
  31. JSSC
    2024
    FreFlex: A High-Performance Processor for Convolution and Attention Computations via Sparsity-Adaptive Dynamic Frequency Boosting
    DOI
    Sadhana Shanmuga Sundaram, Yugandhar Khodke, Yidong Li, Sung-Joon Jang, Sang-Seol Lee, Mingu Kang
    University of California San Diego · AMD · NVIDIA · Korea Electronics Technology Institute
  32. CICC
    2023
    A 1-MHz-Bandwidth Continuous-Time Delta-Sigma ADC Achieving >90dB SFDR and >80dB Antialiasing Using Reference-Switched Resistive Feedback DACs
    DOI
    Sharvil Patil, Raviteja Theertham, Hajime Shibata, Victor Kozlov, Asha Ganesan, Efram Burlingame, Zhao Li, Rama Thakar, Qianqian Zhang, Yue Yin, Aathreya Bhat
    Analog Devices · Meta · NVIDIA
  33. ISSCC
    2023
    9.3 NVLink-C2C: A Coherent Off Package Chip-to-Chip Interconnect with 40Gbps/pin Single-ended Signaling
    DOI
    Ying Wei, Yi Chieh Huang, Haiming Tang, Nithya Sankaran, Ish Chadha, Dai Dai, Olakanmi Oluwole, Vishnu Balan, Edward Lee
    NVIDIA
  34. JSSC
    2023
    A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS
    DOI
    Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray
    NVIDIA
  35. JSSC
    2023
    A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm
    DOI
    Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany
    NVIDIA
  36. VLSI
    2023
    A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS
    DOI
    Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker J. Turner, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray
    NVIDIA
  37. JSSC
    2022
    A Scalable 32–56 Gb/s 0.56–1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS
    DOI
    Mozhgan Mansuri, Rajesh Inti, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James Jaussi
    Intel · NVIDIA
  38. JSSC
    2022
    An On-Chip Relaxation Oscillator in 5-nm FinFET Using a Frequency-Error Feedback Loop
    DOI
    Nandish Mehta, Stephen G. Tell, Walker J. Turner, Lamar Tatro, Jih-Ren Goh, C. Thomas Gray
    NVIDIA
  39. VLSI
    2022
    A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS
    DOI
    Yoshinori Nishi, John W. Poulton, Xi Chen, Sanquan Song, Brian Zimmer, Walker J. Turner, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray
    NVIDIA
  40. VLSI
    2022
    A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm
    DOI
    Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany
    NVIDIA
  41. VLSI
    2022
    An FLL-Based Clock Glitch Detector for Security Circuits in a 5nm FINFET Process
    DOI
    Sanquan Song, Stephen G. Tell, Brian Zimmer, Sudhir S. Kudva, Nikola Nedovic, C. Thomas Gray
    NVIDIA