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企業・研究機関Company / Institute · オランダNetherlands · 2022–2026 LIVE

NXP

世界World 21位 (3 pt) · 対象論文Papers 24

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

024682022 ISSCC: 22022 JSSC: 22022 ESSERC: 2620222023 VLSI: 12023 JSSC: 22023 ESSERC: 2520232024 ISSCC: 12024 VLSI: 22024 JSSC: 12024 CICC: 12024 ESSERC: 3820242025 VLSI: 12025 JSSC: 12025 ESSERC: 2420252026 ISSCC: 112026
ISSCCVLSIJSSCCICCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC2–1–1
VLSI–121–
JSSC2211–
CICC––1––
ESSERC2232–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1442.96世界World #30
VLSI Tier 1411.62世界World #17
JSSC Tier 1643.69世界World #32
CICC Tier 2100.08世界World #22
A-SSCC Tier 2000.00–
ESSERC Tier 2965.17世界World #7

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. ISSCC
    2026
    A 28nm CMOS SAR-Based Continuous-Time Pipeline ADC with 103dB SFDR and 270MHz Bandwidth Using NCF and DAC Error Calibration
    DOI
    Qilong Liu, Robert Rutten, Muhammed Bolatkale, Arda Aralioglu, Gilbert Hardeman, Emil Siby, Patrick van Mourik, Vinoth Ilamurugan, Shagun Bajoria, Lucien Breems
    NXP
  2. ESSERC
    2025
    A 3.6-6.6GHz Multiphase Class-G Doherty Digital Power Amplifier Achieving 48.9% Peak Drain Efficiency in 22 nm FD-SOI CMOS
    DOI
    Ye Wang, Yuyu Ma, Sai-Wang Tam, Ovidiu Carnu, Frans Widdershoven, Chun-Huat Heng
    National University of Singapore · NXP
  3. ESSERC
    2025
    A 7.7-to-9.8GHz SAR TDC FMCW ADPLL with −131dBFS Linearity for 111MHz/25.6us Chirp
    DOI
    Nenad Pavlović, Vladislav Dyachenko, Chuang Lu, Lucien Breems
    NXP
  4. JSSC
    2025
    A 6-GHz Continuous-Time Bandpass ΔΣ ADC With Background Filter Calibration and −100 dBc IM3 for a Mixer-Less DAB Band III Receiver
    DOI
    Shagun Bajoria, Robert Rutten, Muhammed Bolatkale, Yihan Gao, Hans Brekelmans, Bernard Burdiek, Hendrik Van Der Ploeg, Lucien J. Breems
    NXP · NXP
  5. VLSI
    2025
    A 4GHz 2b 5th Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW
    DOI
    Sundeep Javvaji, Lucien Breems, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Kofi Makinwa
    Delft University of Technology · NXP
  6. CICC
    2024
    Advanced Sensing Systems Exploiting the Integration of Flexible and Large-Area TFTs with Si-CMOS Technology
    DOI
    Marco Fattori, Enrico Genco, Carmine Garripoli, Mohammad Zulqarnain, Kris Myny, Eugenio Cantatore
    Eindhoven University of Technology · NXP · KU Leuven
  7. ESSERC
    2024
    A 6GHz Continuous-Time Bandpass ΔΣ ADC with Background Filter Calibration and –100dBc IM3 for a Mixer-Less DAB Band III Receiver
    DOI
    S. Bajoria, R. Rutten, M. Bolatkale, Y. Gao, H. Brekelmans, B. Burdiek, H. Van Der Ploeg, L.J. Breems
    NXP · NXP
  8. ESSERC
    2024
    A 7.3 mW 200 MHz-BW 4-element Passive-Beamforming Continuous-Time ΔΣ ADC with >30dB Spatial Interferer Suppression
    DOI
    Remco Schalk, Patrick van Mourik, Qilong Liu, Shagun Bajoria, Wei Kong, Georgi Radulov, Lucien Breems
    Eindhoven University of Technology · NXP
  9. ESSERC
    2024
    A low-noise always-on interference-robust 125kHz key fob wake-up receiver
    DOI
    Remco van de Beek, Martin Posch, Thomas Baier, Stylianos Perissakis, Manfred Koller
    NXP
  10. ISSCC
    2024
    32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform Synthesizer
    DOI
    Marios Neofytou, Kostas Doris, Marcello Ganzerli, Maarten Lont, Georgi I. Radulov
    NXP · Eindhoven University of Technology
  11. JSSC
    2024
    A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme
    DOI
    Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems
    Delft University of Technology · NXP
  12. VLSI
    2024
    A 0.9V Rail-to-Rail Ultra-Low-Power Fully Integrated Clock Generator Achieving 23fJ/Cycle in 28nm CMOS
    DOI
    Sander Derksen, Maël Demarets, Gerard Villar Piqué, Fabio Sebastiano
    NXP · Delft University of Technology
  13. VLSI
    2024
    A Beyond-the-rail Audio CTΔΣM with a Passive Input Stage and 99.2dB SNDR
    DOI
    S. Li, S. Javvaji, V. Pecanins-Martinez, E. Aydin, R. van Veldhoven, K.A.A. Makinwa
    Delft University of Technology · NXP
  14. ESSERC
    2023
    A 4.6nW Subthreshold Voltage Reference with 400× Current Variation Reduction and 64-Step 0.11% Output Voltage Programmability
    DOI
    Yimai Peng, Ashwin Bhat, Sanjay Wadhwa, David Blaauw, Dennis Sylvester
    University of Michigan · NXP
  15. ESSERC
    2023
    A worldwide-compliant 802.15.4/4z IR-UWB RFDAC transmitter in 28nm CMOS with 12dBm peak output power
    DOI
    Erik Olieman, Helmut Kranabenter, Mark Stoopman, Alberto Dei, Christophe Pinatel, Jan van Sinderen
    NXP · NXP
  16. JSSC
    2023
    A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit
    DOI
    Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie
    Delft University of Technology · NXP · Hong Kong University of Science and Technology · The Hong Kong University of Science and Technology (Guangzhou) · University College Dublin
  17. JSSC
    2023
    A Single-Trim Frequency Reference System With 0.7 ppm/°C From −63 °C to 165 °C Consuming 210 μW at 70 MHz
    DOI
    Alexander S. Delke, Thomas J. Hoen, Anne-Johan Annema, Yanyu Jin, Jos Verlinden, Bram Nauta
    NXP · University of Twente
  18. VLSI
    2023
    A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW
    DOI
    Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude Essink, Koen Beijens, Kofi Makinwa, Lucien Breems
    Delft University of Technology · NXP
  19. ESSERC
    2022
    A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW
    DOI
    P. Cenci, H. Brekelmans, S. Bajoria, M. Ganzerli, B. Burdiek, R. Rutten, Y. Gao, M. Bolatkale, P. Swinkels, L. Breems
    NXP · NXP
  20. ESSERC
    2022
    A 590 µW, 106.6 dB SNDR, 24 kHz BW Continuous-Time Zoom ADC with a Noise-Shaping 4-bit SAR ADC
    DOI
    Shubham Mehrotra, Efraim Eland, Shoubhik Karmakar, Angqi Liu, Burak Gonen, Muhammed Bolatkale, Robert Van Veldhoven, Kofi A.A. Makinwa
    NXP · Delft University of Technology
  21. ISSCC
    2022
    A 28nm 6GHz 2b Continuous-Time $\Delta\Sigma$ ADC with −101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction
    DOI
    Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien Breems
    NXP · NXP
  22. ISSCC
    2022
    A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS
    DOI
    Qilong Liu, Lucien Breems, Chenming Zhang, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi Radulov
    NXP · Eindhoven University of Technology · Delft University of Technology
  23. JSSC
    2022
    A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS
    DOI
    Qilong Liu, Lucien J. Breems, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi Radulov
    NXP · Eindhoven University of Technology
  24. JSSC
    2022
    A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With −101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction
    DOI
    Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems
    NXP · NXP