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企業・研究機関Company / Institute · アメリカUSA · 2022–2026 LIVE

Qualcomm

アメリカUSA 3位 (51.5 pt) · 世界World 13位 (8 pt) · 対象論文Papers 44

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

05101520252022 ISSCC: 22022 VLSI: 32022 JSSC: 122022 CICC: 12022 ESSERC: 32120222023 ISSCC: 12023 VLSI: 32023 JSSC: 4820232024 ISSCC: 22024 JSSC: 42024 A-SSCC: 1720242025 JSSC: 32025 A-SSCC: 1420252026 ISSCC: 22026 VLSI: 12026 JSSC: 142026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC212–2
VLSI33––1
JSSC124431
CICC1––––
A-SSCC––11–
ESSERC3––––

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1722.18アメリカUSA #8 · 世界World #18
VLSI Tier 1712.17アメリカUSA #5 · 世界World #12
JSSC Tier 12444.26アメリカUSA #2 · 世界World #6
CICC Tier 2100.25アメリカUSA #7 · 世界World #22
A-SSCC Tier 2200.22アメリカUSA #2 · 世界World #11
ESSERC Tier 2310.62アメリカUSA #3 · 世界World #22

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. ISSCC
    2026
    5.3 SPARTA: A Scalable, Programmable and Active mm-Wave Dual-Surface Reflect/Transmit Array with Integrated Gain and Phase Control Allowing Bidirectional Signal Routing Capability for Robust and Reconfigurable mm-Wave Networks at 60GHz
    DOI
    Muhamed Fouad Allam, Wenkai Fang, Zijian Shao, Hooman Saeidi, Alexander Stepko, Kaushik Sengupta
    Princeton University · Qualcomm
  2. ISSCC
    2026
    A 2nm Clock-Edge Architecture for Processor Clock-Power Reduction
    DOI
    Yimai Peng, Daniel Yingling, Basma Hajri, Robert Vachon, Fikre Gebreyohannes, Vincent Li, Ghanshyam Chhetri, Keith Bowman
    Qualcomm
  3. JSSC
    2026
    An Adaptive Clock Duty-Cycle Controller to Mitigate Aging-Induced Clock Duty-Cycle Distortion in Automotive and IoT Processors
    DOI
    Daniel J. Yingling, Yimai Peng, Robert J. Vachon, Dipti R. Pal, Sagar J. Jariwala, Felipe R. G. Cabral, Shih-Hsin Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman
    Qualcomm
  4. VLSI
    2026
    A 3nm Variation-Tolerant On-Die Current Sensor for Power-Limits Management
    DOI
    Fikre Gebreyohannes, Yimai Peng, Sohail Asghar, Khaled ElGammal, John MacHale, Keith O'Donoghue, Keith Bowman
    Qualcomm
  5. A-SSCC
    2025
    Multi-band LPWAN Transceiver with Two-step Wake-up Receiver and Switched Capacitor PA Based Transmitter Achieving -125 dBm sensitivity, 6.7 uW at 1 s wake-up latency, and 1 Mbps BFSK modulation
    DOI
    Thinh Tran-Dinh, Hafiz Usman Mahmood, Jinglong Xu, Keun-Mok Kim, Kyung-Sik Choi, Jaeheon Lee, Jinho Ko, Sang-Gug Lee, Jusung Kim
    Korea Advanced Institute of Science and Technology · ETH Zurich · Qualcomm · Yonsei University · Ewha Womans University
  6. JSSC
    2025
    A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator
    DOI
    Yoonseo Cho, Jeonghyun Lee, Suneui Park, Seyeon Yoo, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Samsung · Qualcomm · Seoul National University
  7. JSSC
    2025
    A Bits-to-Antenna F-Band 120-Gb/s CMOS RF-64QAM Transmitter for FutureG Wireless Links
    DOI
    Zisong Wang, Huan Wang, Youssef O. Hassan, Payam Heydari
    University of California, Irvine · Marvell · Qualcomm
  8. JSSC
    2025
    Mixed-Order Correlated Dual-Loop Sturdy MASH CT-ΔΣ Modulator With Distributed Signal Feed-In and VCO Quantizer
    DOI
    Xiaodong Xu, Beomsoo Park, Marino Guzman, Yingjie Chen, Changsok Han, Nima Maghari
    University of Florida · Qualcomm · Texas Instruments · Samsung
  9. A-SSCC
    2024
    A 24% Efficient, 15.36 dBm Output Power, Multi-Standard Digital Polar Transmitter with 7-bit Phase Interpolator-based BFSK Modulator and 23 dB Sidelobe Suppressed PA for Low-Power Wide Area Networks
    DOI
    Hafiz Usman Mahmood, Keun-Mok Kim, Dinh Thinh Tran, Jinglong Xu, Abdul Qahir, Jinho Ko, Jusung Kim, Sang-Gug Lee, Kyung-Sik Choi
    Korea Advanced Institute of Science and Technology · Qualcomm · ETH Zurich · Hanbat National University · Seoul National University of Science and Technology
  10. ISSCC
    2024
    14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion
    DOI
    Daniel Yingling, Yimai Peng, Robert Vachon, Dipti Pal, Sagar Jariwala, Felipe Cabral, Jason Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith Bowman
    Qualcomm
  11. ISSCC
    2024
    17.6 Fully Integrated CMOS Ferrofluidic Biomolecular Processing Platform with On-Chip Droplet-Based Manipulation, Multiplexing and Sensing
    DOI
    Dongwon Lee, Kyung-Sik Choi, Fuze Jiang, Hangxing Liu, Doohwan Jung, Ying Kong, Marco Saif, Zhikai Huang, Jing Wang, Hua Wang
    ETH Zurich · Qualcomm
  12. JSSC
    2024
    A 12.8–15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation
    DOI
    Juyeop Kim, Yongwoo Jo, Hangi Park, Taeho Seong, Younghyun Lim, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm · Kyung Hee University · Seoul National University
  13. JSSC
    2024
    A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation
    DOI
    Xichen Li, Yi-Hsiang Huang, Fucheng Yin, Jacques Christophe Rudell
    University of Washington · Qualcomm
  14. JSSC
    2024
    A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer
    DOI
    Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad Reza Haghighat, Michael P. Flynn
    University of Michigan · Apple · Qualcomm · Intel
  15. JSSC
    2024
    An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR Quantizer
    DOI
    Hsiang-Wen Chen, Seungjong Lee, Michael P. Flynn
    University of Michigan · Qualcomm
  16. ISSCC
    2023
    A CMOS Multi-Functional Biosensor Array for Rapid Low-Concentration Analyte Detection with On-Chip DEP-Assisted Active Enrichment and Manipulation with No External Electrodes
    DOI
    Dongwon Lee, Doohwan Jung, Fuze Jiang, Gregory Villiam Junek, Jongseok Park, Hangxing Liu, Ying Kong, Youngin Kim, Jing Wang, Hua Wang
    ETH Zurich · Qualcomm · Georgia Institute of Technology · Apple
  17. JSSC
    2023
    A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays
    DOI
    Francesco Tesolin, Simone M. Dartizio, Francesco Buccoleri, Alessio Santiccioli, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino
    Politecnico di Milano · Qualcomm
  18. JSSC
    2023
    A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68
    DOI
    Suneui Park, Seyeon Yoo, Yuhwan Shin, Jeonghyun Lee, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  19. JSSC
    2023
    An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer
    DOI
    Seungjong Lee, Taewook Kang, Seungheun Song, Kyumin Kwon, Michael P. Flynn
    University of Michigan · Qualcomm · Apple
  20. JSSC
    2023
    PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference
    DOI
    Bo Zhang, Shihui Yin, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok
    Columbia University · Huawei · Arizona State University · Qualcomm · Samsung · Samsung
  21. VLSI
    2023
    A 0.024mm² 84.2dB-SNDR 1MHz-BW 3 rd -Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM)
    DOI
    Hsiang-Wen Chen, Seungjong Lee, Michael Flynn
    University of Michigan · Qualcomm
  22. VLSI
    2023
    A 122fsrms-Jitter and −60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating Technique
    DOI
    Yoonseo Cho, Jeonghyun Lee, Suneui Park, Seyeon Yoo, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  23. VLSI
    2023
    A 150-MS/s Fully Dynamic SAR-Assisted Pipeline ADC Using a Floating Ring Amplifier and Gain-Enhancing Miller Negative-C
    DOI
    Seungheun Song, Taewook Kang, Seungjong Lee, Michael P. Flynn
    University of Michigan · Apple · Qualcomm
  24. CICC
    2022
    Review, Survey, and Benchmark of Recent Digital LDO Voltage Regulators
    DOI
    Zhaoqing Wang, Sung J. Kim, Keith Bowman, Mingoo Seok
    Columbia University · Qualcomm
  25. ESSERC
    2022
    A 183F 2 Gate Leakage-Based Physically Unclonable Function With Area Efficient Current Tilting-Based Masking Scheme
    DOI
    Beomsoo Park, Nima Maghari
    University of Florida · Qualcomm
  26. ESSERC
    2022
    A 24-to-44 GHz Compact Linear 5G Power Amplifier with Open-Terminated Balun in 65nm Bulk CMOS
    DOI
    Kyutaek Oh, Hyunjin Ahn, Ilku Nam, Ockgoo Lee
    Pusan National University · Qualcomm
  27. ESSERC
    2022
    A Direct Sensor Readout Circuit Using VCO-Driven Chopping with 42dB SNR at 800µVpp Input
    DOI
    Yingjie Chen, Marino D Guzman, Beomsoo Park, Nima Maghari
    University of Florida · Qualcomm
  28. ISSCC
    2022
    A 97fsrms-Jitter and 68-Multiplication Factor, 8.16GHz Ring-Oscillator Injection-Locked Clock Multiplier with Power-Gating Injection-Locking and Background Multi-Functional Digital Calibrator
    DOI
    Suneui Park, Seyeon Yoo, Yuhwan Shin, Jeonghyun Lee, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  29. ISSCC
    2022
    A CMOS Cellular Interface Array for Digital Physiology Featuring High-Density Multi-Modal Pixels and Reconfigurable Sampling Rate
    DOI
    Adam Y. Wang, Yuguo Sheng, Wanlu Li, Doohwan Jung, Greg Junek, Jongseok Park, Dongwon Lee, Mian Wang, Sushila Maharjan, Sagar Kumashi, Jin Hao, Yu Shrike Zhang, Kevin Eggan, Hua Wang
    George Eliava Institute of Bacteriophage, Microbiology and Virology · Harvard University · Qualcomm · Intel
  30. JSSC
    2022
    A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping
    DOI
    Simone M. Dartizio, Francesco Tesolin, Mario Mercandelli, Alessio Santiccioli, Abanob Shehata, Saleh Karman, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Andrea L. Lacaita, Michael P. Kennedy, Carlo Samori, Salvatore Levantino
    Politecnico di Milano · Qualcomm · Infineon · University College Dublin
  31. JSSC
    2022
    A 3.2-GHz 405 fsrms Jitter –237.2 dB FoMJIT Ring-Based Fractional-N Synthesizer
    DOI
    Ahmed Elmallah, Junheng Zhu, Amr Khashaba, Karim M. Megawer, Ahmed Elkholy, Pavan Kumar Hanumolu
    University of Illinois Urbana-Champaign · Qualcomm · Apple · Broadcom
  32. JSSC
    2022
    A Digitally Assisted Multiplexed Neural Recording System With Dynamic Electrode Offset Cancellation via an LMS Interference-Canceling Filter
    DOI
    Nader Sherif Kassem Fathy, Jiannan Huang, Patrick P. Mercier
    University of California San Diego · Qualcomm
  33. JSSC
    2022
    A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time
    DOI
    Simone M. Dartizio, Francesco Buccoleri, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino
    Politecnico di Milano · Infineon · Qualcomm · University of Padua
  34. JSSC
    2022
    A Low-Jitter Ring-DCO-Based Fractional-N Digital PLL With a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector
    DOI
    Hangi Park, Chanwoong Hwang, Taeho Seong, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  35. JSSC
    2022
    A Low-Noise Low-Power Chopper Instrumentation Amplifier With Robust Technique for Mitigating Chopping Ripples
    DOI
    Liang Fang, Ping Gui
    Southern Methodist University · Qualcomm
  36. JSSC
    2022
    A Wide-Lock-In-Range and Low-Jitter 12–14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop
    DOI
    Younghyun Lim, Juyeop Kim, Yongwoo Jo, Jooeun Bang, Jaehyouk Choi
    Qualcomm · Korea Advanced Institute of Science and Technology
  37. JSSC
    2022
    An Eight-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor
    DOI
    Seungjong Lee, Taewook Kang, John Bell, Mohammad Haghighat, Alberto Martinez, Michael P. Flynn
    University of Michigan · Qualcomm · Intel · Microsoft
  38. JSSC
    2022
    An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector
    DOI
    Suneui Park, Seojin Choi, Seyeon Yoo, Yoonseo Cho, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  39. JSSC
    2022
    Correlated Dual-Loop Sturdy MASH Continuous-Time Delta-Sigma Modulators
    DOI
    Beomsoo Park, Changsok Han, Nima Maghari
    University of Florida · Qualcomm · Marvell
  40. JSSC
    2022
    Optically Synchronized Phased Arrays in CMOS
    DOI
    Matan Gal-Katziri, Craig Ives, Armina Khakpour, Ali Hajimiri
    California Institute of Technology · Ben-Gurion University of the Negev · Qualcomm
  41. JSSC
    2022
    Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory
    DOI
    Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor Mudge, Chaitali Chakrabarti, David Blaauw, Ronald Dreslinski, Hun-Seok Kim
    University of Michigan · Qualcomm · Arizona State University
  42. VLSI
    2022
    A 40-nm 646.6TOPS/W Sparsity-Scaling DNN Processor for On-Device Training
    DOI
    Zih-Sing Fu, Yu-Chi Lee, Alex Park, Chia-Hsiang Yang
    National Taiwan University · Qualcomm
  43. VLSI
    2022
    A 90-μW Penny-Sized 1.2-gram Wireless EEG Recorder with 12-Channel FDMA Transmitter for Month-Long Continuous Mental Health Monitoring
    DOI
    Cheng Chen, Joonseok Yang, Hui Wang, Zhidong Cao, Siavash Kananian, Kevin Chen, Ada S. Y. Poon
    Stanford University · Qualcomm
  44. VLSI
    2022
    From System-on-Chip (SoC) to System on Multi-Chip (SoMC) architectures: Scaling integrated systems beyond the limitations of deep-submicron single chip technologies
    DOI
    Christopher Patrick, S.C. Song, Irfan Khan, Nader Nikfar, Matt Severson, Shree Pandey, Matt Kaiser, Manav Shah, Pat Lawlor, Deb Marich, Carina Affinito, Rajeev Jain
    Qualcomm