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JSSC · 2022–2026 LIVE

Qualcomm

対象論文Papers 24 · 筆頭著者first author 4 · 著者按分fractional 4.26 · アメリカUSA #2 · 世界World #6

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Alessio Santiccioli ORCID3
1Seungjong Lee ORCID3
1Seyeon Yoo ORCID3
4Beomsoo Park ORCID2
4Taeho Seong ORCID2
6Anil Kumar1
6Armina Khakpour1
6Dipti R. Pal1
6Fucheng Yin1
6Huan Wang ORCID1
6Jiannan Huang ORCID1
6Jielun Tan1
6John Bell ORCID1
6Junheng Zhu ORCID1
6Liang Fang ORCID1
6Minkyu Kim ORCID1
6Rajan Verma1
6Sagar J. Jariwala1
6Santanu Sarma1
6Seojin Choi ORCID1
6Shih-Hsin Hu ORCID1
6Vamshidhar Chiranji1
6Younghyun Lim ORCID1

対象論文Papers

  1. JSSC
    2026
    An Adaptive Clock Duty-Cycle Controller to Mitigate Aging-Induced Clock Duty-Cycle Distortion in Automotive and IoT Processors
    DOI
    Daniel J. Yingling, Yimai Peng, Robert J. Vachon, Dipti R. Pal, Sagar J. Jariwala, Felipe R. G. Cabral, Shih-Hsin Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman
    Qualcomm
  2. JSSC
    2025
    A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator
    DOI
    Yoonseo Cho, Jeonghyun Lee, Suneui Park, Seyeon Yoo, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Samsung · Qualcomm · Seoul National University
  3. JSSC
    2025
    A Bits-to-Antenna F-Band 120-Gb/s CMOS RF-64QAM Transmitter for FutureG Wireless Links
    DOI
    Zisong Wang, Huan Wang, Youssef O. Hassan, Payam Heydari
    University of California, Irvine · Marvell · Qualcomm
  4. JSSC
    2025
    Mixed-Order Correlated Dual-Loop Sturdy MASH CT-ΔΣ Modulator With Distributed Signal Feed-In and VCO Quantizer
    DOI
    Xiaodong Xu, Beomsoo Park, Marino Guzman, Yingjie Chen, Changsok Han, Nima Maghari
    University of Florida · Qualcomm · Texas Instruments · Samsung
  5. JSSC
    2024
    A 12.8–15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation
    DOI
    Juyeop Kim, Yongwoo Jo, Hangi Park, Taeho Seong, Younghyun Lim, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm · Kyung Hee University · Seoul National University
  6. JSSC
    2024
    A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation
    DOI
    Xichen Li, Yi-Hsiang Huang, Fucheng Yin, Jacques Christophe Rudell
    University of Washington · Qualcomm
  7. JSSC
    2024
    A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer
    DOI
    Taewook Kang, Seungjong Lee, Seungheun Song, Mohammad Reza Haghighat, Michael P. Flynn
    University of Michigan · Apple · Qualcomm · Intel
  8. JSSC
    2024
    An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR Quantizer
    DOI
    Hsiang-Wen Chen, Seungjong Lee, Michael P. Flynn
    University of Michigan · Qualcomm
  9. JSSC
    2023
    A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays
    DOI
    Francesco Tesolin, Simone M. Dartizio, Francesco Buccoleri, Alessio Santiccioli, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino
    Politecnico di Milano · Qualcomm
  10. JSSC
    2023
    A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68
    DOI
    Suneui Park, Seyeon Yoo, Yuhwan Shin, Jeonghyun Lee, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  11. JSSC
    2023
    An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer
    DOI
    Seungjong Lee, Taewook Kang, Seungheun Song, Kyumin Kwon, Michael P. Flynn
    University of Michigan · Qualcomm · Apple
  12. JSSC
    2023
    PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference
    DOI
    Bo Zhang, Shihui Yin, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok
    Columbia University · Huawei · Arizona State University · Qualcomm · Samsung · Samsung
  13. JSSC
    2022
    A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping
    DOI
    Simone M. Dartizio, Francesco Tesolin, Mario Mercandelli, Alessio Santiccioli, Abanob Shehata, Saleh Karman, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Andrea L. Lacaita, Michael P. Kennedy, Carlo Samori, Salvatore Levantino
    Politecnico di Milano · Qualcomm · Infineon · University College Dublin
  14. JSSC
    2022
    A 3.2-GHz 405 fsrms Jitter –237.2 dB FoMJIT Ring-Based Fractional-N Synthesizer
    DOI
    Ahmed Elmallah, Junheng Zhu, Amr Khashaba, Karim M. Megawer, Ahmed Elkholy, Pavan Kumar Hanumolu
    University of Illinois Urbana-Champaign · Qualcomm · Apple · Broadcom
  15. JSSC
    2022
    A Digitally Assisted Multiplexed Neural Recording System With Dynamic Electrode Offset Cancellation via an LMS Interference-Canceling Filter
    DOI
    Nader Sherif Kassem Fathy, Jiannan Huang, Patrick P. Mercier
    University of California San Diego · Qualcomm
  16. JSSC
    2022
    A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time
    DOI
    Simone M. Dartizio, Francesco Buccoleri, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino
    Politecnico di Milano · Infineon · Qualcomm · University of Padua
  17. JSSC
    2022
    A Low-Jitter Ring-DCO-Based Fractional-N Digital PLL With a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector
    DOI
    Hangi Park, Chanwoong Hwang, Taeho Seong, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  18. JSSC
    2022
    A Low-Noise Low-Power Chopper Instrumentation Amplifier With Robust Technique for Mitigating Chopping Ripples
    DOI
    Liang Fang, Ping Gui
    Southern Methodist University · Qualcomm
  19. JSSC
    2022
    A Wide-Lock-In-Range and Low-Jitter 12–14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop
    DOI
    Younghyun Lim, Juyeop Kim, Yongwoo Jo, Jooeun Bang, Jaehyouk Choi
    Qualcomm · Korea Advanced Institute of Science and Technology
  20. JSSC
    2022
    An Eight-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor
    DOI
    Seungjong Lee, Taewook Kang, John Bell, Mohammad Haghighat, Alberto Martinez, Michael P. Flynn
    University of Michigan · Qualcomm · Intel · Microsoft
  21. JSSC
    2022
    An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector
    DOI
    Suneui Park, Seojin Choi, Seyeon Yoo, Yoonseo Cho, Jaehyouk Choi
    Korea Advanced Institute of Science and Technology · Qualcomm
  22. JSSC
    2022
    Correlated Dual-Loop Sturdy MASH Continuous-Time Delta-Sigma Modulators
    DOI
    Beomsoo Park, Changsok Han, Nima Maghari
    University of Florida · Qualcomm · Marvell
  23. JSSC
    2022
    Optically Synchronized Phased Arrays in CMOS
    DOI
    Matan Gal-Katziri, Craig Ives, Armina Khakpour, Ali Hajimiri
    California Institute of Technology · Ben-Gurion University of the Negev · Qualcomm
  24. JSSC
    2022
    Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory
    DOI
    Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor Mudge, Chaitali Chakrabarti, David Blaauw, Ronald Dreslinski, Hun-Seok Kim
    University of Michigan · Qualcomm · Arizona State University