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ESSERC · 2022–2026 LIVE

Seoul National University

対象論文Papers 10 · 筆頭著者first author 8 · 著者按分fractional 7.28 · 韓国Korea #2 · 世界World #13

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Dongsuk Jeon ORCID3
1Jerald Yoo ORCID3
3Jihee Kim ORCID2
3Woo-Seok Choi ORCID2
5Deog-Kyoon Jeong ORCID1
5Dongkwon Lee1
5Ha-Jung Park ORCID1
5Hyunseung Lee1
5Jae W. Lee1
5Jaeha Kim1
5Jeongwoo Park ORCID1
5Jia Park ORCID1
5Jiaer Chen ORCID1
5Jiwon Shin ORCID1
5Joonghyun Song1
5Kahyun Kim ORCID1
5Kyoungjoon Ha1
5Minyoung Kang ORCID1
5Sanghee Lee1
5Sangsu Jeong ORCID1
5Sangwoo Kwon1
5Seong Hoon Seo1
5Seoyoon Jang1
5Soosung Kim1
5Sung Jun Jung1
5Sunghoon Kim ORCID1
5Sungjin Park ORCID1
5Sunwoo Lee ORCID1
5Yeonggeun Song1
5Zhuoyue Li1

対象論文Papers

  1. ESSERC
    2025
    Concurrent Multi-Energy Harvesting IC for Self-Sustained Biomedical Applications
    DOI
    Zhuoyue Li, Joanne Si Ying Tan, Jia Yi Fong, Yingna Huang, Astrid Rusly, Jiaer Chen, Benjamin Ho Yin Lee, Jerald Yoo
    Seoul National University · National University of Singapore
  2. ESSERC
    2025
    Falcon: An Event-Driven Object Tracking SoC with Activation-Skip and Weight-Compression MRAM PIM and Heterogenous Q/K/V Read-Only-Once Attention Flow
    DOI
    Wenao Xie, Haoyang Sang, Zhamaliddin Kalzhan, Jingu Lee, Jerald Yoo, Kangho Lee, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · Seoul National University · Samsung
  3. ESSERC
    2024
    A 1.22fJ/cycle 17T Pseudo-Static True Single-Phase Clock Flip-Flop in 14nm FinFET CMOS
    DOI
    Dongkwon Lee, Sunghoon Kim, Minyoung Kang, Seoyoon Jang, Sungjin Park, Jaeha Kim, Dongsuk Jeon
    Seoul National University
  4. ESSERC
    2024
    A 3.32mW 300MS/s 13b Pipelined SAR ADC Using a Time-Assisted Ringamp with Dynamic Slew Rate and Low-Supply Bias
    DOI
    Rucheng Jiang, Jerald Yoo
    National University of Singapore · Seoul National University
  5. ESSERC
    2024
    An 8 GHz 9 bit Phase-Rotating ILCM with DTC Range Reduction for High-Speed Serial Links
    DOI
    Jia Park, Jihee Kim, Sanghee Lee, Kahyun Kim, Ha-Jung Park, Woo-Seok Choi
    Seoul National University
  6. ESSERC
    2023
    A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE Array
    DOI
    Sunwoo Lee, Jeongwoo Park, Dongsuk Jeon
    Seoul National University · Sungkyunkwan University
  7. ESSERC
    2023
    A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving -64 dBc Reference-Spur and -239 dB FoM
    DOI
    Jiwon Shin, Joonghyun Song, Jihee Kim, Woo-Seok Choi
    Seoul National University
  8. ESSERC
    2022
    A 28nm 1.644TFLOPS/W Floating-Point Computation SRAM Macro with Variable Precision for Deep Neural Network Inference and Training
    DOI
    Sangsu Jeong, Jeongwoo Park, Dongsuk Jeon
    Seoul National University
  9. ESSERC
    2022
    A 40nm 5.6TOPS/W 239GOPS/mm2 Self-Attention Processor with Sign Random Projection-based Approximation
    DOI
    Seong Hoon Seo, Soosung Kim, Sung Jun Jung, Sangwoo Kwon, Hyunseung Lee, Jae W. Lee
    Seoul National University
  10. ESSERC
    2022
    A −247.1 dB FoM, −77.9dBc Reference Spur Ring-Oscillator-Based Injection-Locked Clock Multiplier with Multi-Phase-Based Calibration
    DOI
    Yeonggeun Song, Kyoungjoon Ha, Han-Gon Ko, Min-Seong Choo, Deog-Kyoon Jeong
    Seoul National University · Hanyang University