State Key Laboratory of ASIC and System

対象論文Papers 10 · 筆頭著者first author 9 · 著者按分fractional 3.72 · 世界World #16

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank	著者Author	論文数Papers
1	Xiaoyang Zeng ORCID	4
2	Zhiliang Hong ORCID	3
3	Hongtao Xu ORCID	2
3	Jiawei Xu ORCID	2
3	Liang Xiong	2
3	Patrick Yin Chiang	2
3	Qinjing Pan ORCID	2
3	Tianxiang Qu ORCID	2
3	Yuan Li	2
3	Yun Yin ORCID	2
3	Zhiyuan Chen ORCID	2
12	Biao Tang	1
12	Binbin Chen ORCID	1
12	Chaoyang Zheng	1
12	Chunxiao Hu ORCID	1
12	Cong Tao ORCID	1
12	Diyang Zheng	1
12	Fei Shan	1
12	Fu Gao ORCID	1
12	Hengwei Yu ORCID	1
12	Heyu Ren ORCID	1
12	Jie Lin ORCID	1
12	Jier Wang	1
12	Jing Wang ORCID	1
12	Jiqing Xu	1
12	Jun Han ORCID	1
12	Lei Zhao ORCID	1
12	Liangbo Lei ORCID	1
12	Liheng Liu ORCID	1
12	Miao Sun ORCID	1
12	Ming Zhong ORCID	1
12	Na Yan ORCID	1
12	Shenglong Zhuo ORCID	1
12	Tao Xia ORCID	1
12	Tong Li ORCID	1
12	Wei Chen	1
12	Wenjun Gong ORCID	1
12	Xianglong Jia ORCID	1
12	Yangzi Liu	1
12	Ye Lu ORCID	1
12	Yi Yang	1
12	Yicheng Li ORCID	1
12	Yiting Zhu	1
12	Yumei Huang ORCID	1
12	Zhen Li ORCID	1
12	Zhihong Lin	1

対象論文Papers

JSSC
2025

A 225-μW Interference-Tolerant Receiver With Shared Wireless LO and Envelope-Tracking Mixer Achieving -104-dBm Sensitivity
DOI
Heyu Ren, Liangjian Lyu, Binbin Chen, Wenjun Gong, Xing Wu, C.-J. Richard Shi

Fudan University · State Key Laboratory of ASIC and System · East China Normal University · University of Washington
JSSC
2025

A Hybrid Buck-or-Boost Converter for Fast-Transient and Wide-Voltage-Range Applications With Continuous Output Delivery Current
DOI
Junyi Ruan, Junmin Jiang, Chenzhou Ding, Kai Yuan, Ka Nang Leung, Zhiyuan Chen, Xiaoyang Zeng, Xun Liu

Chinese University of Hong Kong, Shenzhen · Southern University of Science and Technology · Chinese University of Hong Kong · Fudan University · State Key Laboratory of ASIC and System
JSSC
2025

A Sub-Nanosecond Pulsed VCSEL Driver With PVT-Compensated Constant Current, Integrated Boost Switching Regulator and Class-1 Laser Eye Safety
DOI
Ming Zhong, Yifan Wu, Yuan Li, Wei Chen, Miao Sun, Liujia Song, Shanyu Cui, Xuefeng Chen, Patrick Yin Chiang, Shenglong Zhuo, Tao Xia

Fudan University · State Key Laboratory of ASIC and System · Tongji University · Nanyang Technological University · Centre for Integrated Circuits and Systems · Peking University
JSSC
2025

Enhancing Efficiency in Piezoelectric Energy Harvesting: Collaborative-Flip Synchronized Switch Harvesting on Capacitors Rectifier and Multioutput DC-DC Converters Utilizing Shared Capacitors
DOI
Jing Wang, Yi Yang, Zhen Li, Sijun Du, Xinling Yue, Xun Liu, Jun Han, Xiaoyang Zeng, Zhiyuan Chen

Fudan University · State Key Laboratory of ASIC and System · Delft University of Technology · Chinese University of Hong Kong, Shenzhen
JSSC
2024

A Low-Power, Compact, 0.1–5.5-GHz, 40-dBm IB OIP3 LNTA-First Receiver for SDR
DOI
Cong Tao, Liangbo Lei, Chaoyang Zheng, Yumei Huang, Zhiliang Hong, Xiaoyang Zeng

Fudan University · State Key Laboratory of ASIC and System
JSSC
2023

A 0.5-mΩ/√Hz Dry-Electrode Bioimpedance Interface With Current Mismatch Cancellation and Input Impedance of 100 MΩ at 50 kHz
DOI
Qinjing Pan, Tianxiang Qu, Biao Tang, Fei Shan, Zhiliang Hong, Jiawei Xu

Fudan University · State Key Laboratory of ASIC and System
JSSC
2023

A 1.8–GΩ Input-Impedance 0.15–μV Input-Referred–Ripple Chopper Amplifier With Local Positive Feedback and SAR-Assisted Ripple Reduction
DOI
Tianxiang Qu, Qinjing Pan, Liheng Liu, Xiaoyang Zeng, Zhiliang Hong, Jiawei Xu

Fudan University · State Key Laboratory of ASIC and System
JSSC
2023

A Fully-Integrated Wideband Digital Polar Transmitter With 11-bit Digital-to-Phase Converter in 40nm CMOS
DOI
Chunxiao Hu, Yun Yin, Tong Li, Yangzi Liu, Liang Xiong, Hongtao Xu

Fudan University · State Key Laboratory of ASIC and System
JSSC
2023

Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20-W/Ch Transmitter, and a 128 × 128 SPAD Receiver With SNR-Based Pixel Binning and Resolution Upscaling
DOI
Shenglong Zhuo, Tao Xia, Lei Zhao, Miao Sun, Yifan Wu, Lei Wang, Hengwei Yu, Jiqing Xu, Jier Wang, Zhihong Lin, Yuan Li, Lei Qiu, Rui Bai, Xuefeng Chen, Patrick Yin Chiang

Fudan University · State Key Laboratory of ASIC and System · Tongji University
JSSC
2022

A 15-Bit Quadrature Digital Power Amplifier With Transformer-Based Complex-Domain Efficiency Enhancement
DOI
Yicheng Li, Yun Yin, Diyang Zheng, Xianglong Jia, Jie Lin, Fu Gao, Yiting Zhu, Liang Xiong, Na Yan, Ye Lu, Hongtao Xu

Fudan University · State Key Laboratory of ASIC and System