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企業・研究機関Company / Institute · イタリアItaly · 2022–2026 LIVE

STMicroelectronics

世界World 21位 (3 pt) · 対象論文Papers 19

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

024682022 JSSC: 32022 ESSERC: 4720222023 ISSCC: 12023 ESSERC: 2320232024 ESSERC: 2220242025 VLSI: 12025 ESSERC: 1220252026 ISSCC: 22026 VLSI: 12026 JSSC: 252026
ISSCCVLSIJSSCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC–1––2
VLSI–––11
JSSC3–––2
ESSERC4221–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1320.88世界World #42
VLSI Tier 1211.29世界World #28
JSSC Tier 1521.79世界World #37
CICC Tier 2000.00–
A-SSCC Tier 2000.00–
ESSERC Tier 2965.65世界World #7

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. ISSCC
    2026
    17.2 the STM32N6 Microcontroller: Enabling Intelligent Edge AI for IoT and Beyond
    DOI
    G. Desoli, J-F. Agaësse, N. Chawla, E. Hilkens, T. Boesch, V. Taufour, M. Ayodhyawasi, P. Ravenhill, S. Pal-Singh, M. Soulie
    STMicroelectronics · STMicroelectronics · STMicroelectronics · STMicroelectronics
  2. ISSCC
    2026
    A 48-to-82.5GHz CMOS Split-Tail Gilbert-Cell Frequency Doubler Achieving 11% PAE at 8.5dBm Output Power
    DOI
    Jismal Jamal, Lorenzo Piotto, Federico Vecchi, Mahmoud M. Pirbazari, Andrea Mazzanti
    University of Pavia · STMicroelectronics
  3. JSSC
    2026
    A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm 2
    DOI
    Marco Pasotti, Riccardo Zurla, J. J. Bertolini Agnoletto, Emanuela Calvetti, Alessio Antolini, Andrea Lico, Giuseppe Desoli, Riccardo Vignali, Luca Iannelli, Luigi Croce, Francesco Zavalloni, Eleonora Franchi Scarselli, Alessandro Cabrini
    STMicroelectronics · University of Bologna · University of Pavia
  4. JSSC
    2026
    High-Precision Close-to-Analog Programming of PCM Cells as Devices for AiMC Edge-AI
    DOI
    Alessio Antolini, Andrea Lico, Francesco Zavalloni, Lorenzo Greco, Riccardo Zurla, Jacopo Bertolini, Riccardo Vignali, Luca Iannelli, Emanuela Calvetti, Marco Pasotti, Alessandro Cabrini, Eleonora Franchi Scarselli
    University of Bologna · STMicroelectronics · University of Pavia
  5. VLSI
    2026
    A 0.5W/mm 2 -Power-Density, 91.6%-Peak-Efficiency, Resonant Dual-Path Interleaved DC-DC Converter
    DOI
    S. Zaffin, M. Leoncini, A. Bertolini, A. Dago, A. Gasparini, S. Levantino, M. Ghioni
    Politecnico di Milano · STMicroelectronics
  6. ESSERC
    2025
    28 M Weights $\times$ TOPs $/ \mathrm{W}/\text{mm}^{2}$ PCM-Based Analog in-Memory Computing Core with 8 $512 \times 512{}$-Weight Layers in 28 nm FD-SOI CMOS
    DOI
    M. Pasotti, R. Zurla, J. J. Bertolini Agnoletto, E. Calvetti, A. Antolini, L. Croce, G. Desoli, L. Iannelli, A. Lico, R. Vignali, F. Zavalloni, E. Franchi Scarselli, A. Cabrini
    STMicroelectronics · University of Bologna · University of Pavia
  7. VLSI
    2025
    The Evolution of Edge AI: Contextual Awareness and Generative Intelligence
    DOI
    Alessandro Cremonesi
    STMicroelectronics
  8. ESSERC
    2024
    A fully integrated Hall Sensor Analog Front End with Analog closed loop self-calibration
    DOI
    Francesco Borgioli, Lorenzo Ercolini, Danilo Karim Kaddouri, Dario Paci, Roberto Pio Baorda, Paolo Angelini
    STMicroelectronics
  9. ESSERC
    2024
    Robust and Compact Quaternary Symbol Coding 3Cells/2Bits16MB Embedded PCM Solution in 28nm FD-SOI CMOS with Automotive Grade
    DOI
    M. Carissimi, A. Tomasoni, A. Ventre, R. Grasso, M. Perroni, D. Manfrè, C. Torti, A. Molgora, A. Maurelli, A. Gandolfo, A. Cathelin, A. Bonfanti, F. Disegni
    STMicroelectronics · Politecnico di Milano
  10. ESSERC
    2023
    A Compact Wide-Input-Range Time-Domain Buck Converter with Fast Transient Response for Industrial Applications
    DOI
    Paolo Melillo, Mauro Leoncini, Simone Zaffin, Alberto Brunero, Alessandro Gasparini, Salvatore Levantino, Massimo Ghioni
    Politecnico di Milano · STMicroelectronics
  11. ESSERC
    2023
    Integrated Metal Shunt with Matched Sensing Resistor for High-Side Current Sensing
    DOI
    Roberto Pio Baorda, Tommaso Rosa, Paolo Angelini, Giorgio Bosisio, Alberto Cattani
    STMicroelectronics
  12. ISSCC
    2023
    16.7 A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications
    DOI
    Giuseppe Desoli, Nitin Chawla, Thomas Boesch, Manui Avodhyawasi, Harsh Rawat, Hitesh Chawla, VS Abhijith, Paolo Zambotti, Akhilesh Sharma, Carmine Cappetta, Michele Rossi, Antonio De Vita, Francesca Girardi
    STMicroelectronics · STMicroelectronics · STMicroelectronics
  13. ESSERC
    2022
    A PMUT Transceiver Front-End with 100-V TX Driver and Low-Noise Voltage Amplifier in BCD-SOI Technology
    DOI
    Lara Novaresi, Piero Malcovati, Andrea Mazzanti, Edoardo Bonizzoni, Marco Terenzi, Stefano Ottaviani, Davide Ugo Ghisu, Fabio Quaglia, Alessandro Stuart Savoia
    University of Pavia · STMicroelectronics · Roma Tre University
  14. ESSERC
    2022
    An Extended Temperature Range ePCM Memory in 90-nm BCD for Smart Power Applications
    DOI
    M. Carissimi, C. Auricchio, E. Calvetti, L. Capecchi, M. Torres, S. Zanchi, P. Gupta, R. Zurla, A. Cabrini, D. Gallinari, F. Disegni, M. Borghi, E. Palumbo, A. Redaelli, M. Pasotti
    STMicroelectronics · STMicroelectronics · University of Pavia
  15. ESSERC
    2022
    An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation
    DOI
    Alessio Antolini, Andrea Lico, Eleonora Franchi Scarselli, Antonio Gnudi, Luca Perilli, Mattia Luigi Torres, Marcella Carissimi, Marco Pasotti, Roberto Antonio Canegallo
    University of Bologna · STMicroelectronics
  16. ESSERC
    2022
    The Next “Automation Age”: How Semiconductor Technologies Are Changing Industrial Systems and Applications
    DOI
    Domenico Arrigo, Claudio Adragna, Vincenzo Marano, Rachela Pozzi, Fulvio Pulicelli, Francesco Pulvirenti
    STMicroelectronics
  17. JSSC
    2022
    Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology
    DOI
    Farhad Bozorgi, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti
    University of Pavia · Barkhausen Institut · STMicroelectronics · Silicon Austria Labs (Austria)
  18. JSSC
    2022
    Radiation Tolerant Multi-Bit Flip-Flop System With Embedded Timing Pre-Error Sensing
    DOI
    Abhishek Jain, Andrea Mario Veggetti, Dennis Crippa, Antonio Benfante, Simone Gerardin, Marta Bagatin
    STMicroelectronics · STMicroelectronics · University of Padua
  19. JSSC
    2022
    Ultra-Low Phase Noise X-Band BiCMOS VCOs Leveraging the Series Resonance
    DOI
    Alessandro Franceschin, Domenico Riccardi, Andrea Mazzanti
    University of Pavia · STMicroelectronics · Infineon