VLSI · 2022–2026 LIVE

TSMC

対象論文Papers 33 · 筆頭著者first author 16 · 著者按分fractional 21.69 · 台湾Taiwan #1 · 世界World #3

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank	著者Author	論文数Papers
1	Tsung-Yung Jonathan Chang ORCID	17
2	Hung-Jen Liao	9
3	Win-San Khwa ORCID	7
3	Yu-Der Chih	7
5	Hong-Chen Cheng	6
5	Meng-Fan Chang ORCID	6
7	Hidehiro Fujiwara ORCID	5
7	Yih Wang	5
9	Isabel Wang	4
9	Yu-Hao Hsu	4
11	Haruki Mori ORCID	3
11	Quincy Li	3
11	Y.D. Chih	3
14	C.R. Hsieh	2
14	Cheng-En Lee	2
14	Ching Lin Jen	2
14	Frank Lee	2
14	Gary Chan	2
14	H.J. Liao	2
14	Harry Chuang	2
14	J. J. Wu	2
14	J.-C. Liu	2
14	Jhon-Jhy Liaw	2
14	Jonathan Chang	2
14	Jui-Jen Wu ORCID	2
14	K.C. Huang	2
14	Kenny Cheng-Hsiang Hsieh	2
14	M. F. Chang	2
14	Shenggao Li	2
14	Shien-Yang Michael Wu	2
14	Shu-Huan Hsu	2
14	Ted Chu ORCID	2
14	Tze-Chiang Huang	2
14	Yao-Yi Liu	2
14	Yen-Huei Chen ORCID	2
14	Yung-Chow Peng	2
37	Aditya Gayatri	1
37	Alex Liu	1
37	Amy Lai	1
37	An-Shun Teng	1
37	Atul Katoch	1
37	B. Pulicherla	1
37	B.-S. Lien	1
37	Bei-Shing Lien	1
37	Boris Bai	1
37	Brian Lin	1
37	C-E. Lee	1
37	C-F. Lee	1
37	C-J. Tsen	1
37	C-K. Chuang	1
37	C.-H. Chang	1
37	C.-S. Chang	1
37	C.C. Huang	1
37	C.E. Chen	1
37	C.F. Wang	1
37	C.H. Wen	1
37	C.W. Chan	1
37	C.Y. Chang	1
37	C.Y. Tsai	1
37	Carlos H. Diaz	1
37	Chao-Chieh Li	1
37	Chao-Kai Chuang	1
37	Chen-Wei Liang	1
37	Cheng-Han Lu	1
37	Cheng-Yin Wang	1
37	Chi-Shi Chen	1
37	Chia-Fu Lee	1
37	Chien-Chun Tsai	1
37	Chien-Yu Huang	1
37	Chih-Hsien Chang	1
37	Chih-Yu Lin	1
37	Chin-Ho Chang	1
37	Chin-I Su	1
37	Chin-Ming Fu	1
37	Chin-Shan Hou	1
37	Ching Wei Wu	1
37	Chu-En Hsia	1
37	Chun-Pin Lin	1
37	Chungi Huang	1
37	Derek Tao	1
37	Duncan Yang	1
37	Fred Kuo	1
37	Geoffrey Yeap ORCID	1
37	Gu-Huan Li	1
37	H. -L. Chiang	1
37	H. Fujiwara	1
37	H.-H. Hsieh	1
37	H.-S. P. Wong	1
37	H.H. Wang	1
37	H.J. Li	1
37	H.Y. Chen	1
37	Hsin-Hung Kuo	1
37	Hsin-Jou Chuang	1
37	I. P. Radu	1
37	J-M. Hung	1
37	J. Cai	1
37	J.-F. Wang	1
37	J.-J. Horng	1
37	J.H. Hsuen	1
37	Je-Min Hung ORCID	1
37	Jimmy Wang	1
37	Jordan Hsu	1
37	Julien Yang	1
37	K. Khare	1
37	K.-L. Cheng	1
37	K.-W. Su	1
37	K.C. Tseng	1
37	K.P. Chang	1
37	Kang-Hui Peng	1
37	Kate Huang	1
37	Kenny Hsieh	1
37	Kerem Akarvardar ORCID	1
37	Kevin Lin	1
37	King-Ho Tam	1
37	Krishna Khairnar	1
37	Kuo-Cheng Lin	1
37	Leo Liu	1
37	Li-Ling Luo	1
37	Li-Yu Yeh	1
37	Liang-Yi Lin	1
37	Lien-Jung Hung	1
37	M.-C. F. Chang	1
37	Mark Zhou	1
37	Mei Wong	1
37	Ming-Chieh Huang	1
37	Mu-Shan Lin	1
37	Muya Chang ORCID	1
37	Nai-Chen Cheng	1
37	Nian-Shyang Chang	1
37	Nick Zhang	1
37	P.W. Wang	1
37	Peijiun Lin	1
37	Perng-Fei Yuh	1
37	Peter Hsu	1
37	Ping-Sheng Wu ORCID	1
37	Ping-Wei Wang	1
37	Po-Sheng Wang ORCID	1
37	Po-Yi Huang	1
37	Po-Yu Lai	1
37	Robin Lee	1
37	S.F. Liu	1
37	Samsoo Kim	1
37	Sevic Chen	1
37	Shankar Kanade	1
37	Shaun Chou	1
37	Shih-Hsin Teng	1
37	Shu-Chun Yang	1
37	Szu-Lin Liu	1
37	Szuya Sandy Liao	1
37	T-L. Chou	1
37	T-Y. Jonathan Chang	1
37	T.-C. Chen	1
37	T.-J. Yeh	1
37	Tan-Li Chou	1
37	Tom Chen	1
37	Tsung-Che Lu	1
37	Tsung-Hsien Huang	1
37	W-C. Zhao	1
37	W.-S. Chou	1
37	W.F. Chen	1
37	W.T. Chu	1
37	Wan-Hsueh Cheng	1
37	Wei Wing Mar	1
37	Wei-Chang Zhao	1
37	Wei-Chih Chen	1
37	Wei-Hsiang Wang	1
37	Wei-Pin Changchien	1
37	Wei-Xiang You	1
37	Wen-Ching Chen	1
37	Wen-Hung Huang	1
37	Wie-Lin Lai	1
37	Wu-Chin Tsai	1
37	Y. Wang	1
37	Y.-C. Chen	1
37	Y.-C. Peng	1
37	Y.-W. Chen	1
37	Y.C. Huang	1
37	Y.H. Chen	1
37	Y.W. Ting	1
37	Y.W. Wang	1
37	Yangsyu Lin	1
37	Yen-Hsiang Huang	1
37	Yi-Chen Lu	1
37	Yi-Ching Liu	1
37	Yi-Chun Shih ORCID	1
37	Yi-Hsin Nien	1
37	Young Suk Kim	1
37	Yu-Cheng Lin ORCID	1
37	Yu-Chi Chen	1
37	Yu-Jie Huang	1
37	Yuh-Jier Mii	1
37	Yung-Shun Chen	1
37	Z.H. Ya	1

対象論文Papers

VLSI
2026

A $\mathbf{2 n m}$ 37.4 Mbit $/ \text{mm}^{2}$ Dual-Rail SRAM with Row-Access Aware Read Tracking and Write Assist Circuits Enabling 2.28 pJ/Access Energy Efficient Operation
DOI
Ryo Takamatsu, Makoto Yabuuchi, Masaya Hamada, Tomotaka Tanaka, Shu-Huan Hsu, Yao-Yi Liu, Yuichiro Ishii, Koji Nii, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2026

A $\mathbf{2 n m}$ Nanosheet $\mathbf{1 2 8 K b}$ Anti-Fuse One-Time-Programmable Memory Featuring Core-Transistor-Only High Voltage Program Circuit and Fault-Tolerant Design
DOI
Gu-Huan Li, Wan-Hsueh Cheng, Chen-Wei Liang, Shaun Chou, Perng-Fei Yuh, Li-Yu Yeh, Yen-Hsiang Huang, Yi-Ching Liu, Chungi Huang, Duncan Yang, Yih Wang, Tsung-Yung Jonathan Chang, Lien-Jung Hung, Ping-Wei Wang, Chin-Shan Hou, Hsin-Jou Chuang, An-Shun Teng, Li-Ling Luo, Jordan Hsu

TSMC
VLSI
2026

A 0.75V, 1.43%-Inaccuracy 4T MOS-Based Voltage Reference in $251 \mu \mathrm{m}^{2}$ Area
DOI
Szu-Lin Liu, Bei-Shing Lien, Wie-Lin Lai, Yi-Chen Lu, Ching-Lin Jen, Yung-Chow Peng, Kenny Cheng-Hsiang Hsieh

TSMC
VLSI
2026

A 25.3% Area-Efficient 1CPP Mask ROM with Robust Power Mesh on 2-nm NanoSheet Logic CMOS
DOI
Ryota Watanabe, Kazumasa Uno, Hidemitsu Kojima, Ayumu Yamada, Hiromasa Otsubo, Ted Chu, Tsung-Hsien Huang, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2026

A 2nm 234.4 TOPS/W and 511.9 $\text{TOPS}/\text{mm}^{2}$ Digital Computing-in-Memory Compiler with Multiple MAC Units per Weight and Multiple Data Format Support
DOI
Hidehiro Fujiwara, Brian Crafton, Haruki Mori, Je-Min Hung, Wei-Chang Zhao, Ashwin Sanjay LeLe, Bo Zhang, Chao-Kai Chuang, Hiroaki Ishii, Cheng-En Lee, Vineet Joshi, Xiaochen Peng, Xiaoyu Sun, Shu-Huan Hsu, Yao-Yi Liu, Takeshi Hashizume, Yu-Hao Hsu, Win-San Khwa, Saman Adham, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Kerem Akarvardar, Meng-Fan Chang, Tsung-Yung Jonathan Chang

TSMC · TSMC · TSMC（日本拠点）TSMC Japan
VLSI
2026

µAgent: A 7nm 404.3mJ/Action Edge SoC for Agentic AI Reasoning with Adaptive Block-Wise Mixed-Format 4-Bit Quantization and Decoupled Access-Execute
DOI
Wonsuk Jang, Christian Kubicka, Allen Pan, Pullabhatla Smriti, Win-San Khwa, Meng-Fan Chang, Priyanka Raina, Thierry Tambe

Stanford University · TSMC
VLSI
2025

A 13.8% Speed-Enhanced 1T Mask ROM by Algorithmically Signed Program Data on 3-nm Fin-FET Logic CMOS
DOI
Ryota Watanabe, Hidemitsu Kojima, Kazumasa Uno, Hiromasa Otsubo, Ted Chu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2025

A 22nm 41.8TFLOPS/W AI-Edge Transformer/CNN Nonvolatile-Processor Using QKV-Softmax-Layer-Fused Hybrid ReRAM-CIM and Concurrent-Transpose/Non-Transpose SRAM-CIM
DOI
Hung-Hsi Hsu, Win-San Khwa, Tai-Hao Wen, Wei-Ting Hsu, Yu-Chen Chang, Hsin-Yin Lu, Hua-Jin Wen, Chang-Yuan Chen, Yen-Che Huang, Chih-Ling Wu, Ping-Sheng Wu, Mon-Shu Ho, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shih-Hsin Teng, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang

National Tsing Hua University · TSMC · National Chung Hsing University
VLSI
2025

A 3nm 125 Tops/W-29 TFLOPS/W, 90 TOPS/mm2-17 TFLOPS/mm2 SRAM-Based INT8 and FP16 Digital-CIM Compiler with Multi-Weight Update/Cycle
DOI
Haruki Mori, J-M. Hung, W-C. Zhao, K. Khare, B. Crafton, H. Ishii, C-E. Lee, X. Peng, X. Sun, Y. Fujino, C-J. Tsen, V. Joshi, C-K. Chuang, T. Hashizume, C-F. Lee, T-L. Chou, K. Akarvardar, S. Adham, Y. Wang, H. Fujiwara, Y-D. Chih, Y-H. Chen, H-J. Liao, T-Y. Jonathan Chang

TSMC · TSMC · TSMC（日本拠点）TSMC Japan
VLSI
2025

A 3nm FinFET 563kbit 35.5Mbit/mm2 Dual-Rail SRAM with 3.89pJ/Access High Energy Efficient andμW/Mbit 1-Cycle Latency Low-Leakage Mode
DOI
Yumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Kazuto Mizutani, Masaya Hamada, Yuichiro Ishii, Koji Nii, Mark Zhou, J.C. Liu, Chien-Yu Huang, Kang-Hui Peng, Yu-Hao Hsu, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2025

A CMOS-Compatible 12nm 8Mb MLC RRAM Enabling Producible 2-Bit Per Cell for High Energy Efficiency Compute-In-Memory in Edge AI Applications
DOI
C.Y. Tsai, S.F. Liu, J.H. Hsuen, Brian Lin, C.R. Hsieh, C.W. Chan, C.Y. Chang, Y.C. Huang, Julien Yang, J.J. Wu, Y.W. Chen, M.F. Chang, Y.D. Chih, W.T. Chu, K.C. Huang, Harry Chuang

TSMC
VLSI
2025

A Prototype 16Mbit RRAM on 55nm BCD with 56% Compact-Area Wordline Driver and Constant Write-Current Scheme for Automotive 150°C Operation
DOI
Kohei Santo, Masayoshi Nakayama, Reiji Mochida, Hitoshi Suwa, Motoki Tamura, Atsuo Mangyo, Koji Nii, Yu-Cheng Lin, C.F. Wang, Wu-Chin Tsai, Y.D. Chih, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2025

Clo-HDnn: A 4.66 TFLOPS/W and 3.78 TOPS/W Continual On-Device Learning Accelerator with Energy-Efficient Hyperdimensional Computing via Progressive Search
DOI
Chang Eun Song, Weihong Xu, Keming Fan, Soumil Jain, Gopabandhu Hota, Haichao Yang, Leo Liu, Kerem Akarvardar, Meng-Fan Chang, Carlos H. Diaz, Gert Cauwenberghs, Tajana Rosing, Mingu Kang

University of California San Diego · TSMC
VLSI
2025

Compact, Low-Loss, Cost-Effective, CMOS Embedded RF Switch Solution Achieving DC-100GHz True-Time Delay Phase Shifter by Phase Change Material
DOI
H.J. Li, K.P. Chang, C.E. Chen, Y.T. Lin, C.C. Huang, Y.W. Wang, W.F. Chen, H.Y. Chen, C.R. Hsieh, Z.H. Ya, H.H. Wang, Y.W. Ting, K.C. Tseng, Z. M. Tsai, K.C. Huang, Harry Chuang

TSMC · National Yang Ming Chiao Tung University
VLSI
2024

A 0.296pJ/bit 17.9Tb/s/mm2 Die-to-Die Link in 5nm/6nm FinFET on a 9μm-Pitch 3D Package Achieving 10.24Tb/s Bandwidth at 16Gb/s PAM-4
DOI
Mu-Shan Lin, Chien-Chun Tsai, Shenggao Li, Tze-Chiang Huang, Wen-Hung Huang, Kate Huang, Yu-Chi Chen, Alex Liu, Yu-Jie Huang, Jimmy Wang, Shu-Chun Yang, Nai-Chen Cheng, Chao-Chieh Li, Hsin-Hung Kuo, Wei-Chih Chen, C.H. Wen, Kevin Lin, Po-Yi Huang, Kenny Cheng-Hsiang Hsieh, Frank Lee

TSMC
VLSI
2024

A 22nm Nonvolatile AI-Edge Processor with 21.4TFLOPS/W using 47.25Mb Lossless-Compressed-Computing STT-MRAM Near-Memory-Compute Macro
DOI
De-Qi You, Win-San Khwa, Jui-Jen Wu, Chuan-Jia Jhang, Guan-Yi Lin, Po-Jung Chen, Ting-Chien Chiu, Fang-Yi Chen, Andrew Lee, Yu-Cheng Hung, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang

National Tsing Hua University · TSMC · TSMC
VLSI
2024

A 3.3GHz 1024X640 Multi-Bank Single-Port SRAM with Frequency Enhancing Techniques and 0.55V-1.35V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
DOI
Ming-Chieh Huang, Wei Wing Mar, Shankar Kanade, Boris Bai, Aditya Gayatri, Krishna Khairnar, Amy Lai, Yu-Hao Hsu, Hung-Jen Liao, Yih Wang, Tsung-Yung Jonathan Chang

TSMC
VLSI
2024

A 3nm Fin-FET 19.87-Mbit/mm2 2RW Pseudo Dual-Port 6T SRAM with High-R Wire Tracking and Sequential Access Aware Dynamic Power Reduction
DOI
Tomotaka Tanaka, Yuichiro Ishii, Makoto Yabuuchi, Yumito Aoyagi, Masaya Hamada, Kazuto Mizutani, Koji Nii, Hidehiro Fujiwara, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2024

An On-Chip Current-Sink-Free Adaptive-Timing Power Impedance Measurement (PIM) Unit for 3D-IC in 5nm FinFET Technology
DOI
Tsung-Che Lu, Chin-Ming Fu, Wei-Hsiang Wang, Fred Kuo, Chih-Hsien Chang, Kenny Hsieh, King-Ho Tam, Tze-Chiang Huang, Tom Chen, Mei Wong, Wei-Pin Changchien, Frank Lee

TSMC
VLSI
2024

Current Mirrors with Tapered Stacked-Gates for Area Saving or Noise Improvement in 3nm FinFET Process
DOI
Chu-En Hsia, Chin-Ho Chang, Yung-Shun Chen, Po-Yu Lai, Ching Lin Jen, Yung-Chow Peng, Shenggao Li

TSMC
VLSI
2024

MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating
DOI
Kartik Prabhu, Robert M. Radway, Jeffrey Yu, Kai Bartolone, Massimo Giordano, Fabian Peddinghaus, Yonatan Urman, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina

Stanford University · TSMC
VLSI
2023

3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
DOI
Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2023

A 2.38 MCells/mm2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop Mitigation
DOI
Samuel D. Spetalnick, Muya Chang, Shota Konno, Brian Crafton, Ashwin S. Lele, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury

Georgia Institute of Technology · TSMC
VLSI
2023

A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices
DOI
Tai-Hao Wen, Je-Min Hung, Hung-Hsi Hsu, Yuan Wu, Fu-Chun Chang, Chung-Yuan Li, Chih-Han Chien, Chin-I Su, Win-San Khwa, Jui-Jen Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Mon-Shu Ho, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang

National Tsing Hua University · TSMC · TSMC · National Chung Hsing University
VLSI
2023

A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking
DOI
Yumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

TSMC（日本拠点）TSMC Japan · TSMC
VLSI
2023

A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications
DOI
Jonathan Chang, Yen-Huei Chen, Gary Chan, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Sevic Chen, Peijiun Lin, Ching-Wei Wu, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Atul Katoch, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li

TSMC
VLSI
2023

A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology
DOI
Nick Zhang, Young Suk Kim, Peter Hsu, Samsoo Kim, Derek Tao, Hung-Jen Liao, P.W. Wang, Geoffrey Yeap, Quincy Li, Tsung-Yung Jonathan Chang

TSMC
VLSI
2023

How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology
DOI
H.-L. Chiang, R. A. Hadi, J.-F. Wang, H.-C. Han, J.-J. Wu, H.-H. Hsieh, J.-J. Horng, W.-S. Chou, B.-S. Lien, C.-H. Chang, Y.-C. Chen, Y.-H. Wang, T.-C. Chen, J.-C. Liu, Y.-C. Liu, M.-H. Chiang, K.-H. Kao, B. Pulicherla, J. Cai, C.-S. Chang, K.-W. Su, K.-L. Cheng, T.-J. Yeh, Y.-C. Peng, C. Enz, M.-C. F. Chang, M.-F. Chang, H.-S. P. Wong, I. P. Radu

TSMC · University of California, Los Angeles · École Polytechnique Fédérale de Lausanne · National Cheng Kung University
VLSI
2023

Write-enhanced Single-ended 11T SRAM Enabling Single Bitcell Reconfigurable Compute-in-Memory Employing Complementary FETs
DOI
Wei-Xiang You, Cheng-Yin Wang, Yih Wang, Tsung-Yung Jonathan Chang, Szuya Sandy Liao

TSMC
VLSI
2022

A 12nm 121-TOPS/W 41.6-TOPS/mm2 All Digital Full Precision SRAM-based Compute-in-Memory with Configurable Bit-width For AI Edge Applications
DOI
Chia-Fu Lee, Cheng-Han Lu, Cheng-En Lee, Haruki Mori, Hidehiro Fujiwara, Yi-Chun Shih, Tan-Li Chou, Yu-Der Chih, Tsung-Yung Jonathan Chang

TSMC
VLSI
2022

A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology
DOI
Nail Etkin Can Akkaya, Gary Chan, H.J. Liao, Yih Wang, Jonathan Chang

TSMC · TSMC
VLSI
2022

A 28-nm 25.1 TOPS/W Sparsity-Aware CNN-GCN Deep Learning SoC for Mobile Augmented Reality
DOI
Wen-Cong Huang, I-Ting Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang

National Taiwan University · TSMC
VLSI
2022

Semiconductor Innovations, from Device to System
DOI
Yuh-Jier Mii

TSMC