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JSSC · 2022–2026 LIVE

University of Bologna

対象論文Papers 6 · 筆頭著者first author 3 · 著者按分fractional 2.06 · 世界World #76

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Davide Rossi ORCID4
2Francesco Conti ORCID3
2Luca Benini ORCID3
4Alessio Antolini ORCID2
4Andrea Lico ORCID2
4Eleonora Franchi Scarselli ORCID2
4Francesco Zavalloni ORCID2
4Gianmarco Ottavi ORCID2
9Angelo Garofalo ORCID1
9Giuseppe Tagliavini ORCID1
9Hayate Okuhara ORCID1
9Jie Chen ORCID1
9Lorenzo Greco ORCID1
9Marco Guermandi ORCID1

対象論文Papers

  1. JSSC
    2026
    A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm 2
    DOI
    Marco Pasotti, Riccardo Zurla, J. J. Bertolini Agnoletto, Emanuela Calvetti, Alessio Antolini, Andrea Lico, Giuseppe Desoli, Riccardo Vignali, Luca Iannelli, Luigi Croce, Francesco Zavalloni, Eleonora Franchi Scarselli, Alessandro Cabrini
    STMicroelectronics · University of Bologna · University of Pavia
  2. JSSC
    2026
    High-Precision Close-to-Analog Programming of PCM Cells as Devices for AiMC Edge-AI
    DOI
    Alessio Antolini, Andrea Lico, Francesco Zavalloni, Lorenzo Greco, Riccardo Zurla, Jacopo Bertolini, Riccardo Vignali, Luca Iannelli, Emanuela Calvetti, Marco Pasotti, Alessandro Cabrini, Eleonora Franchi Scarselli
    University of Bologna · STMicroelectronics · University of Pavia
  3. JSSC
    2025
    Occamy: A 432-Core Dual-Chiplet Dual-HBM2E 768-DP-GFLOP/s RISC-V System for 8-to-64-bit Dense and Sparse Computing in 12-nm FinFET
    DOI
    Paul Scheffler, Thomas Benz, Viviane Potocnik, Tim Fischer, Luca Colagrande, Nils Wistoff, Yichao Zhang, Luca Bertaccini, Gianmarco Ottavi, Manuel Eggimann, Matheus Cavalcante, Gianna Paulin, Frank K. Gürkaynak, Davide Rossi, Luca Benini
    ETH Zurich · Integrated Systems Laboratory · University of Bologna · Stanford University
  4. JSSC
    2024
    Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2–8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing
    DOI
    Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggiman, Hayate Okuhara, Luca Benini
    University of Bologna · ETH Zurich · Integrated Systems Laboratory · National University of Singapore
  5. JSSC
    2024
    Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine
    DOI
    Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini
    ETH Zurich · Integrated Systems Laboratory · University of Bologna · Universidad de Los Andes, Chile
  6. JSSC
    2022
    Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
    DOI
    Davide Rossi, Francesco Conti, Manuel Eggiman, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini
    University of Bologna · ETH Zurich