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ESSERC · 2022–2026 LIVE

University of Padua

対象論文Papers 2 · 筆頭著者first author 1 · 著者按分fractional 0.82 · 世界World #74

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Agata Iesurum ORCID2
1Andrea Bevilacqua ORCID2
3Davide Manente ORCID1

対象論文Papers

  1. ESSERC
    2024
    A 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs
    DOI
    Luigi Grimaldi, Agata Iesurum, Giovanni Boi, Fabio Versolatto, Giovanni Steffan, Fabio Padovan, Heorhii Koltsov, Andrea Bevilacqua, Dmytro Cherniak
    Infineon · University of Padua
  2. ESSERC
    2022
    A 24 GHz Quadrature VCO Based on Coupled PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset in 28 nm CMOS
    DOI
    Agata Iesurum, Davide Manente, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua
    University of Padua · Infineon