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JSSC · 2022–2026 LIVE

University of Pavia

対象論文Papers 16 · 筆頭著者first author 8 · 著者按分fractional 7.06 · 世界World #42

所属著者Affiliated authors

ORCID が一致する著者は同一人物としてまとめています。それ以外は表記ごとに別人として扱います。Authors sharing an ORCID are merged; other spellings are listed separately.

順位Rank著者Author論文数Papers
1Andrea Mazzanti ORCID8
2Danilo Manstretta ORCID3
3Alessandro Cabrini ORCID2
3Antonio Aprile ORCID2
3Edoardo Bonizzoni ORCID2
3Guglielmo De Filippi ORCID2
3Lorenzo Piotto ORCID2
3Luca Iannelli2
3Piero Malcovati ORCID2
3Riccardo Vignali ORCID2
11Alessandro Franceschin ORCID1
11Andrea Bilato ORCID1
11Domenico Riccardi ORCID1
11Fabio Quadrelli ORCID1
11Farhad Bozorgi ORCID1
11Francesco Svelto1
11Franco Maloberti ORCID1
11Jaya Satyanarayana Yarragunta ORCID1
11Mahmoud M. Pirbazari ORCID1
11Rinaldo Castello ORCID1

対象論文Papers

  1. JSSC
    2026
    A +43.3-dBm IIP 3 , Low-Power Transimpedance Amplifier Employing a Switched-Capacitor Amplifier-Based Transition-Band Pole-Zero Doublets Compensation Technique
    DOI
    Bowei Xiao, Jin Jin, Haipeng Bai, Wen Wu, Danilo Manstretta, Tongde Huang
    Nanjing University of Science and Technology · University of Pavia
  2. JSSC
    2026
    A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm 2
    DOI
    Marco Pasotti, Riccardo Zurla, J. J. Bertolini Agnoletto, Emanuela Calvetti, Alessio Antolini, Andrea Lico, Giuseppe Desoli, Riccardo Vignali, Luca Iannelli, Luigi Croce, Francesco Zavalloni, Eleonora Franchi Scarselli, Alessandro Cabrini
    STMicroelectronics · University of Bologna · University of Pavia
  3. JSSC
    2026
    A Wideband Digitally Assisted Frequency Tripler With Adaptively Optimized Output Power in 55-nm SiGe BiCMOS
    DOI
    Daniele Lodi Rizzini, Francesco Tesolin, Michele Rossoni, Riccardo Moleri, Filippo Osio, Andrea Mazzanti, Andrea L. Lacaita, Simone M. Dartizio, Salvatore Levantino
    Politecnico di Milano · University of Pavia
  4. JSSC
    2026
    Design Insights Into Sixth-Order Matching Networks for a 105–175-GHz Ultra-Wideband SiGe BiCMOS LNA
    DOI
    Guglielmo De Filippi, Lorenzo Piotto, Andrea Bilato, Andrea Mazzanti
    University of Pavia
  5. JSSC
    2026
    High-Precision Close-to-Analog Programming of PCM Cells as Devices for AiMC Edge-AI
    DOI
    Alessio Antolini, Andrea Lico, Francesco Zavalloni, Lorenzo Greco, Riccardo Zurla, Jacopo Bertolini, Riccardo Vignali, Luca Iannelli, Emanuela Calvetti, Marco Pasotti, Alessandro Cabrini, Eleonora Franchi Scarselli
    University of Bologna · STMicroelectronics · University of Pavia
  6. JSSC
    2025
    A 78.2-dB Dynamic Range Shunt-Based Current Sensor for BLDC Motor Control With 2.75- μ s Conversion Time and 0.4-mm² Active Area
    DOI
    Antonio Aprile, Jaya Satyanarayana Yarragunta, Andreas Fugger, Francesco Conzatti, Edoardo Bonizzoni, Piero Malcovati
    University of Pavia · Infineon
  7. JSSC
    2025
    AM–AM and AM–PM Distortion in D -Band BiCMOS Vector-Interpolation Phase Shifters
    DOI
    Lorenzo Piotto, Guglielmo De Filippi, Andrea Bilato, Andrea Mazzanti
    University of Pavia
  8. JSSC
    2025
    Analysis and Design of a CMOS E-Band Frequency Quadrupler With Transformer-Based Harmonic Reflectors
    DOI
    Paolo Ricco, Gianfranco Avitabile, Danilo Manstretta
    Polytechnic University of Bari · University of Pavia
  9. JSSC
    2024
    A 14–32 GHz SiGe-BiCMOS Gilbert-Cell Frequency Doubler With Self-Adjusted Reduced Duty-Cycle Performance Enhancement
    DOI
    Lorenzo Piotto, Guglielmo De Filippi, Gianluca Brozzetti, Daniele Dal Maistro, Simone Erba, Andrea Mazzanti
    University of Pavia · Infineon
  10. JSSC
    2024
    An Area-Efficient Smart Temperature Sensor Based on a Fully Current Processing Error-Feedback Noise-Shaping SAR ADC in 180-nm CMOS
    DOI
    Antonio Aprile, Michele Folz, Daniele Gardino, Piero Malcovati, Edoardo Bonizzoni
    University of Pavia
  11. JSSC
    2022
    A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter
    DOI
    Jin Jin, Jianhui Wu, Rinaldo Castello, Danilo Manstretta
    Southeast University · University of Pavia
  12. JSSC
    2022
    A Broadband 22–31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
    DOI
    Fabio Quadrelli, Davide Manente, David Seebacher, Fabio Padovan, Matteo Bassi, Andrea Mazzanti, Andrea Bevilacqua
    University of Pavia · University of Padua · Infineon
  13. JSSC
    2022
    A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS
    DOI
    Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui P. Martins
    University of Macau · University of Pavia
  14. JSSC
    2022
    Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology
    DOI
    Farhad Bozorgi, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti
    University of Pavia · Barkhausen Institut · STMicroelectronics · Silicon Austria Labs (Austria)
  15. JSSC
    2022
    E-Band Frequency Sextupler With >35 dB Harmonics Rejection Over 20 GHz Bandwidth in 55 nm BiCMOS
    DOI
    Mahmoud M. Pirbazari, Andrea Mazzanti
    University of Pavia
  16. JSSC
    2022
    Ultra-Low Phase Noise X-Band BiCMOS VCOs Leveraging the Series Resonance
    DOI
    Alessandro Franceschin, Domenico Riccardi, Andrea Mazzanti
    University of Pavia · STMicroelectronics · Infineon