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大学University · スイスSwitzerland · 2022–2026 LIVE

ETH Zurich

世界World 8位 (17.5 pt) · 対象論文Papers 123

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0102030402022 ISSCC: 52022 VLSI: 52022 JSSC: 82022 CICC: 22022 ESSERC: 32320222023 ISSCC: 32023 VLSI: 52023 JSSC: 42023 CICC: 12023 A-SSCC: 12023 ESSERC: 31720232024 ISSCC: 32024 VLSI: 52024 JSSC: 72024 CICC: 32024 A-SSCC: 22024 ESSERC: 52520242025 ISSCC: 92025 VLSI: 12025 JSSC: 112025 CICC: 12025 A-SSCC: 32025 ESSERC: 73220252026 ISSCC: 42026 VLSI: 52026 JSSC: 122026 CICC: 5262026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC53394
VLSI55515
JSSC8471112
CICC21315
A-SSCC–123–
ESSERC3357–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1241715.26世界World #8
VLSI Tier 1211714.80世界World #7
JSSC Tier 1422019.22世界World #11
CICC Tier 212108.47世界World #20
A-SSCC Tier 2612.22世界World #22
ESSERC Tier 2181511.63世界World #3

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    A 1.92um Pitch Current-Controlled Oscillator ADC Array Featuring Charge-Injection-Based Two-Stage Conversion for In-Memory Computing
    DOI
    David Iselin, Kyeongwon Jeong, Tim Keller, Giorgio Cristiano, Kwantae Kim, Woojun Choi, Oscar Toomey, Abhairaj Singh, Athanasios Vasilopoulos, Abu Sebastian, Manuel Le Gallo, Taekwang Jang
    ETH Zurich · IBM
  2. CICC
    2026
    A 1nJ•mmHg 2 RDC Using a Double-Settling RC Bridge and a Common-Mode Cancelling Series-Parallel Amplifier for Implantable Pressure and Strain Monitoring
    DOI
    Tim Keller, Arturo di Girolamo, Yiyang Chen, Hesam Ghiasi, Donguk Seo, Yoonmyung Lee, Taekwang Jang
    ETH Zurich · Sungkyunkwan University
  3. CICC
    2026
    A 400 × 400 Perovskite Image Sensor with Pixel-Wise Dynamic Self-Adjustment Using Time-Efficient Multiple Sampling and Adaptive Resolution
    DOI
    Kyuik Cho, Sergey Tsarev, Quang Lung, Erfu Wu, Sergii Yakunin, Ivan Shorubalko, Maksym Kovalenko, Taekwang Jang
    ETH Zurich · Swiss Federal Laboratories for Materials Science and Technology
  4. CICC
    2026
    An 11bit, 140fs resolution, and 683fs INL Zero-Slope Digital-to-Time Converter for Fractional Frequency Syntheses
    DOI
    Kyeongwon Jeong, Hesam Omdeh Ghiasi, Seungki Hong, Sina Arjmandpour, Oscar Toomey, Taekwang Jang
    ETH Zurich
  5. CICC
    2026
    Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond
    DOI
    Paul Scheffler, Thomas Benz, Tim Fischer, Lorenzo Leone, Sina Arjmandpour, Luca Benini
    ETH Zurich · Integrated Systems Laboratory
  6. ISSCC
    2026
    20.1 An Ultra-Compact Asymmetrically Load-Pulled Series Doherty Power Amplifier in 22Nm FDSOI CMOS with 25.3dBm P sat and 29.7% PAE 6dB for Ku-Band 6G FR3
    DOI
    Jinglong Xu, Tzu-Yuan Huang, Mohamed Eleraky, Islam Tolaib, Hua Wang
    ETH Zurich
  7. ISSCC
    2026
    20.4 An Ultra-Compact, Inherently Resilient FR3 Source-Follower Power Amplifier with 4:1 VSWR Resilience and RIMD Immunity for Large-Scale SATCOM and 6G Phased Arrays
    DOI
    Mohamed Eleraky, Jianping Zeng, Hua Wang
    ETH Zurich
  8. ISSCC
    2026
    29.4 Shape-Memory Multi-Size Micro-Cage Array on CMOS with Integrated Electrochemical Sensors for Joint Bio-Sample Manipulation and Sensing
    DOI
    Zhikai Huang, Fuze Jiang, Hangxing Liu, Adam Wang, Yuguo Sheng, Marco Saif, Hua Wang
    ETH Zurich
  9. ISSCC
    2026
    33.2 An Infinite-Loop CMOS-Compatible Isolator Enabled True VSWR-Resilient Power Amplifier for 6G FR3 in Massive MIMO and Phased-Array Systems
    DOI
    Mohsen Ghorbanpoor, Mohamed Eleraky, Konstantinos Manetakis, Pascal Nussbaum, Hua Wang
    Swiss Center for Electronics and Microtechnology (Switzerland) · ETH Zurich
  10. JSSC
    2026
    A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET
    DOI
    Jaewon Lee, Pier-Andrea Francese, Matthias Bräendli, Thomas Morf, Marcel Kossel, Seoyoung Jang, Yujin Choi, Donggeon Kim, Taekwang Jang, Gain Kim
    Daegu Gyeongbuk Institute of Science and Technology · IBM · ETH Zurich
  11. JSSC
    2026
    A 28-GHz Extremely Compact Doherty Power Amplifier With a Single Transformer-Based Doherty Active Load Modulation Matching Network
    DOI
    Edward Liu, Hua Wang
    ETH Zurich
  12. JSSC
    2026
    A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition
    DOI
    Kyeongwon Jeong, Can Livanelioglu, Jiawei Liao, Inhee Lee, Taekwang Jang
    Yonsei University · ETH Zurich · University of Pittsburgh
  13. JSSC
    2026
    A 40k-Pixel Multimodal Biophysiology Monitoring Platform With 10k Concurrent Electrophysiology Channels and a Mixer-Embedded Σ Δ Impedance Sensor
    DOI
    Hangxing Liu, Fuze Jiang, Jingjing Zang, Marco Saif, Thomas Burger, Stephan C. F. Neuhauss, Hua Wang
    ETH Zurich · Integrated Systems Laboratory · University of Zurich
  14. JSSC
    2026
    A 7.5- μ W 35-Keyword End-to-End Keyword Spotting System With Random Augmented On-Chip Training
    DOI
    Hyuk-Jin Lee, Kyunghoon Pyo, Taekwang Jang, Mingoo Seok, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich · Columbia University
  15. JSSC
    2026
    A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays
    DOI
    Mohamed Eleraky, Tzu-Yuan Huang, Hua Wang
    ETH Zurich
  16. JSSC
    2026
    A MEMS-Free 4096-Pixel CMOS E-Nose Array With MOF-Based Molecular Selectivity, In-Pixel Thermal Regeneration, and a Compact Single-Coefficient Bandpass Sigma--Delta ADC
    DOI
    Marco Saif, Adam Y. Wang, Shao-Wei Lo, Fuze Jiang, Zhikai Huang, Jiachen Wang, Hangxing Liu, Chih-Jen Shih, Thomas Burger, Hua Wang
    ETH Zurich
  17. JSSC
    2026
    A Thermally Adaptive Ku-Band Array-Scalable Transmitter Incorporating VSWR-Resilient PA for Ground Terminal Phased-Array Applications
    DOI
    Mohamed Eleraky, Alessandro Novello, Giorgio Cristiano, Basem Abdelaziz Abdelmagid, Yuqi Liu, Jianping Zeng, Jinglong Xu, Boce Lin, Jonas Nann, Hangxing Liu, Marco Saif, Niccolo Villaggi, Lavinia Recchioni, Tzu-Yuan Huang, Thomas Burger, Thomas Kleier, Hua Wang
    ETH Zurich
  18. JSSC
    2026
    An R-RC Oscillator Achieving Second-Order Temperature Compensation and Oscillating Independently From the Comparator and Reset Delays
    DOI
    Youngwoo Ji, Jiawei Liao, Sina Arjmandpour, Alessandro Novello, Jae-Yoon Sim, Taekwang Jang
    Hanbat National University · ETH Zurich · Pohang University of Science and Technology
  19. JSSC
    2026
    An Ultra-Compact Series Doherty Power Amplifier With a Single-Footprint Output Combiner for Ku-Band FR3
    DOI
    Jinglong Xu, Tzu-Yuan Huang, Mohamed Eleraky, Islam A. Tolaib, Basem Abdelaziz Abdelmagid, Hua Wang
    ETH Zurich
  20. JSSC
    2026
    An Ultra-Low-Loss On-Chip Isolator Featuring Coupling-Engineered Non-Reciprocal Infinite-Loop Enabling a VSWR-Resilient Power Amplifier
    DOI
    Mohsen Ghorbanpoor, Mohamed Eleraky, Konstantinos Manetakis, Pascal Nussbaum, Hua Wang
    Swiss Center for Electronics and Microtechnology (Switzerland) · ETH Zurich
  21. JSSC
    2026
    V-/E-Band Joint-Feeding Gate/Source Broadband LNA With Three-Line Coupler for Simultaneous Noise/Power Matching
    DOI
    Boce Lin, Andrea Ruffino, Niccolò Villaggi, Tzu-Yuan Huang, Chenhao Chu, Hua Wang
    ETH Zurich
  22. VLSI
    2026
    A 256-Channel, 32-Interconnect, 1.25-NEF, in Vitro and In Vivo Neural Interface With Auto-Calibrated Input Impedance Boosting and on-Chip Spike Detection for Flexible Capacitive Microelectrode Array
    DOI
    Yiyang Chen, Suhyeon Nam, Sun-woong Byun, Pietro Velcich, Shinil Cho, Chanwoo Lee, Ju Young Lee, Sean Weaver, Enrico Brugnolotto, Eunkyu Hwang, Dongseok Seo, Eunee Lee, Ki Jun Yu, Woojun Choi, Taekwang Jang
    ETH Zurich · Yonsei University · Institut Català de Nanociència i Nanotecnologia
  23. VLSI
    2026
    A 39pJ/b 7.3Gbps 1.3mm 2 Multi-Subcarrier Massive MU-MIMO-OFDM Detector Exploiting Beamspace Sparsity and Frequency-Domain Correlation in 22FDX
    DOI
    Abhishek Kumar, Seyed Hadi Mirfarshbafan, Oscar Castañeda, Christoph Studer
    ETH Zurich
  24. VLSI
    2026
    A 5.7-6.8GHz Capacitively-Coupled Series-Assisted Parallel-Resonance VCO Achieving −148.8 dBc/Hz PN, 193.5 FoM, and 202.0 FoM A at 10MHz Offset
    DOI
    Jiang Gong, Long He, Taekwang Jang
    ETH Zurich
  25. VLSI
    2026
    A 50-mm 2 Crystal-Free Bidirectional WPDT System with Carrier-Reuse Clocking for Implantable Neural Interfaces
    DOI
    Cong Ding, Mingxiang Gao, Shaokang Zhao, Niels Kuster, Armin Tajalli, Mahsa Shoaran
    École Polytechnique Fédérale de Lausanne · ETH Zurich
  26. VLSI
    2026
    Class-D LC Oscillator-Based Capacitively Isolated DC-DC Converters with False-Mode Prevention Technique Achieving 91.3% and 43.3% Peak-Efficiencies
    DOI
    Suyang Song, Taekwang Jang
    ETH Zurich
  27. A-SSCC
    2025
    A 78.2/90.0dB-SNDR/SFDR Pipelined-SAR ADC with Noise-Reducing Stacked Dynamic Source-Follower Amplifiers
    DOI
    Menghe Jin, Kyuik Cho, Kyojin Choo
    École Polytechnique Fédérale de Lausanne · ETH Zurich
  28. A-SSCC
    2025
    A Fractional Spur Compensation Technique in Digital PLLs with over 30dB Spur Suppression
    DOI
    Parham Davami, Guillaume Mocquard, Thomas Burger
    ETH Zurich
  29. A-SSCC
    2025
    Multi-band LPWAN Transceiver with Two-step Wake-up Receiver and Switched Capacitor PA Based Transmitter Achieving -125 dBm sensitivity, 6.7 uW at 1 s wake-up latency, and 1 Mbps BFSK modulation
    DOI
    Thinh Tran-Dinh, Hafiz Usman Mahmood, Jinglong Xu, Keun-Mok Kim, Kyung-Sik Choi, Jaeheon Lee, Jinho Ko, Sang-Gug Lee, Jusung Kim
    Korea Advanced Institute of Science and Technology · ETH Zurich · Qualcomm · Yonsei University · Ewha Womans University
  30. CICC
    2025
    A 27-39GHz 48Gbit/s 8-Channel Phased Array Transceiver Frontend with Broadband TX/RX Co-Design Optimization
    DOI
    Niccolò Villaggi, Yuqi Liu, Tzu-Yuan Huang, Sensen Li, Taiyun Chi, Hua Wang
    ETH Zurich · The University of Texas at Austin · Rice University
  31. ESSERC
    2025
    A 0.32mm 2 100 Mb/s 223mW ASIC in 22FDX for Joint Jammer Mitigation, Channel Estimation, and SIMO Data Detection
    DOI
    Jonas Elmiger, Fabian Stuber, Oscar Castañeda, Gian Marti, Christoph Studer
    ETH Zurich
  32. ESSERC
    2025
    A 14 ns-Latency $9 \text{Gb}/\mathrm{s} 0.44 \text{mm}^{2} 62 \text{pJ}/\mathrm{b}$ Short-Blocklength LDPC Decoder ASIC in 22FDX
    DOI
    Darja Nonaca, Jérémy Guichemerre, Reinhard Wiesmayr, Nihat Engin Tunali, Christoph Studer
    ETH Zurich
  33. ESSERC
    2025
    A 24 GHz Compact 3:1 VSWR-Resilient Power Amplifier with a Reconfigurable Output Matching Network and Integrated Power Sensors
    DOI
    Edward Liu, Filippo Svelto, Hua Wang
    ETH Zurich
  34. ESSERC
    2025
    A 410 GFLOP/s, 64 RISC-V Cores, 204.8 GBps Shared-Memory Cluster in 12 nm FinFET with Systolic Execution Support for Efficient B5G/6G AI-Enhanced O-RAN
    DOI
    Yichao Zhang, Marco Bertuletti, Sergio Mazzola, Samuel Riedel, Luca Benini
    ETH Zurich · Integrated Systems Laboratory
  35. ESSERC
    2025
    A Jammer-Resilient 2.87 mm 2 1.28 MS/s 310mW Multi-Antenna Synchronization ASIC in 65 Nm
    DOI
    Flurin Arquint, Oscar Castañeda, Gian Marti, Christoph Studer
    ETH Zurich
  36. ESSERC
    2025
    ElfCore: A 28nm Neural Processor Enabling Dynamic Structured Sparse Training and Online Self-Supervised Learning with Activity-Dependent Weight Update
    DOI
    Zhe Su, Giacomo Indiveri
    University of Zurich · ETH Zurich · Institute of Neuroinformatics
  37. ESSERC
    2025
    Two 5.6 mW Over-Neutralized 120 Ghz Low-Noise Amplifiers in 14 nm FinFET CMOS
    DOI
    Puneet Singh, Peter Baumgartner, Hui Zhang, Yuqi Liu, Hua Wang, Vadim Issakov
    Technische Universität Braunschweig · Intel · ETH Zurich
  38. ISSCC
    2025
    10.3 A D-Band 2D-Scalable 4×4 Active Reflective Relay with Orthogonally Polarized on-Chip TX/RX Antennas and in-Front-End Common-Centroid Fast Azimuth/Elevation Angle-of-Arrival Detection
    DOI
    Basem Abdelaziz Abdelmagid, Boce Lin, Hua Wang
    ETH Zurich
  39. ISSCC
    2025
    19.10 A 4.6GHz ${63.3}\text{fs}_{\text{rms}}$ PLL-XO Co-Design Using a Self-Aligned Pulse-Injection Driver Achieving −255.2dB $\text{FoM}_{\mathrm{J}}$ Including the XO Power and Noise
    DOI
    Can Livanelioglu, Long He, Jiang Gong, Sina Arjmandpour, Gabriele Atzeni, Taekwang Jang
    ETH Zurich
  40. ISSCC
    2025
    20.4 MEMS-Free 4096-Pixel CMOS E-Nose Gas-Sensor Array with Molecular-Selective Metal-Organic-Framework Sensing and In-Pixel Thermodynamic Modulation for Fast Sensor Regeneration
    DOI
    Marco Saif, Fuze Jiang, Shao–Wei Lo, Adam Wang, Zhikai Huang, Jiachen Wang, Hangxing Liu, Chih–Jen Shih, Thomas Burger, Hua Wang
    ETH Zurich
  41. ISSCC
    2025
    33.4: A Wideband Bidirectional Calibration-Free Frequency/Switching-Staggering $360^{\circ}$ D-Band Phase Shifter with Frequency-Invariant Codes Achieving lt; {2.38}^{\circ}/{0.63}\text{dB}$ RMS-Errors Over 24% Bandwidth
    DOI
    Basem Abdelaziz Abdelmagid, Yuqi Liu, Hua Wang
    ETH Zurich
  42. ISSCC
    2025
    37.8 A 13.5µW 35-Keyword End-to-End Keyword Spotting System Featuring Personalized On-Chip Training in 28nm CMOS
    DOI
    Hyuk-Jin Lee, Kyunghoon Pyo, Taekwang Jang, Mingoo Seok, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich · Columbia University
  43. ISSCC
    2025
    5.5 An Ultra-Compact Wideband Load-Insensitive Complex-Cascode LC-Neutralized Power Amplifier for 4:1-VSWR-Resilient Operations in Large-Scale Phased Arrays
    DOI
    Mohamed Eleraky, Tzu-Yuan Huang, Hua Wang
    ETH Zurich
  44. ISSCC
    2025
    A 3.47 NEF 175.2dB FOMs Direct Digitization Front-End Featuring Delta Amplification for Enhanced Dynamic Range and Energy Efficiency in Bio-Signal Acquisition
    DOI
    Kyeongwon Jeong, Can Livanelioglu, Jiawei Liao, Inhee Lee, Taekwang Jang
    ETH Zurich · University of Pittsburgh
  45. ISSCC
    2025
    An 18.5nF-Input-Range PM-SAR-Hybrid Capacitance-to-Digital Converter Achieving 6.1μs Conversion Time at 18.1pF Input Capacitance
    DOI
    Donghyun Youn, Kyeongwon Jeong, Woongro Youn, Hoyong Seong, Yechan Park, Sohmyung Ha, Minkyu Je
    Korea Advanced Institute of Science and Technology · ETH Zurich · New York University Abu Dhabi
  46. ISSCC
    2025
    An 8.62μW 75dB-DR SoC End-to-End Spoken-Language-Understanding SoC With Channel-Level AGC and Temporal-Sparsity-Aware Streaming-Mode RNN
    DOI
    Sheng Zhou, Zixiao Li, Tobi Delbruck, Kwantae Kim, Shih-Chii Liu
    University of Zurich · ETH Zurich · Aalto University
  47. JSSC
    2025
    A 27–39-GHz VSWR-Resilient Compact True Power and Gain Sensor With Built-In Sensing Error Compensation for Integrated Power Amplifiers
    DOI
    Edward Liu, David Munzer, Jeongseok Lee, Jianping Zeng, Hua Wang
    ETH Zurich · Georgia Institute of Technology · Samsung
  48. JSSC
    2025
    A 4.6-GHz 54.5-fs rms PLL-XO Co-Design Featuring a Pulse-Injection XO Driver
    DOI
    Can Livanelioglu, Long He, Jiang Gong, Sina Arjmandpour, Gabriele Atzeni, Taekwang Jang
    ETH Zurich
  49. JSSC
    2025
    A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment
    DOI
    Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui P. Martins, Pui-In Mak, Edoardo Charbon
    University of Macau · École Polytechnique Fédérale de Lausanne · ETH Zurich
  50. JSSC
    2025
    A D -Band Concurrent 20-Beam MIMO Transmitter Array With a Four-Element Joint Static/Dynamic Beam-Multiplication Beamformer
    DOI
    Kyung-Sik Choi, Basem Abdelaziz Abdelmagid, Yuqi Liu, Hua Wang
    ETH Zurich
  51. JSSC
    2025
    A D-Band 120-GHz 2-D Scalable 4 × 4 Relay Array With Orthogonally Polarized On-Chip Antennas and In-Front-End Fast 2-D Angle-of-Arrival Detection
    DOI
    Basem Abdelaziz Abdelmagid, Boce Lin, Hua Wang
    ETH Zurich
  52. JSSC
    2025
    A Fully Integrated 4:1 DC–DC Converter With Series Transmission and Parallel Reception Through Electromagnetically Coupled Class-D LC Oscillators
    DOI
    Donghyeok Cho, Taekwang Jang, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich
  53. JSSC
    2025
    A Ka-Band Doherty-Like Non-Load Modulated Power Amplifier
    DOI
    Edward Liu, Han Zhou, Christian Fager, Hua Wang
    ETH Zurich · Chalmers University of Technology
  54. JSSC
    2025
    An 8.62-μW 75-dB DR SoC Fully Integrated SoC for Spoken Language Understanding
    DOI
    Sheng Zhou, Zixiao Li, Longbiao Cheng, Jérôme Hadorn, Chang Gao, Qinyu Chen, Tobi Delbruck, Kwantae Kim, Shih-Chii Liu
    ETH Zurich · Institute of Neuroinformatics · Delft University of Technology · Leiden University · Aalto University
  55. JSSC
    2025
    How to Keep Pushing ML Accelerator Performance? Know Your Rooflines!
    DOI
    Marian Verhelst, Luca Benini, Naveen Verma
    KU Leuven · ETH Zurich · Princeton University
  56. JSSC
    2025
    Occamy: A 432-Core Dual-Chiplet Dual-HBM2E 768-DP-GFLOP/s RISC-V System for 8-to-64-bit Dense and Sparse Computing in 12-nm FinFET
    DOI
    Paul Scheffler, Thomas Benz, Viviane Potocnik, Tim Fischer, Luca Colagrande, Nils Wistoff, Yichao Zhang, Luca Bertaccini, Gianmarco Ottavi, Manuel Eggimann, Matheus Cavalcante, Gianna Paulin, Frank K. Gürkaynak, Davide Rossi, Luca Benini
    ETH Zurich · Integrated Systems Laboratory · University of Bologna · Stanford University
  57. JSSC
    2025
    Ultrawideband Distributed Amplifier With Positive Feedback and Intrastack Coupling
    DOI
    Dongwon Lee, Kyung-Sik Choi, Yuqi Liu, Jeongsoo Park, Laurenz Kulmer, Tzu-Yuan Huang, Juerg Leuthold, Hua Wang
    ETH Zurich
  58. VLSI
    2025
    A 33aFrms34pF Base Capacitance, 192fF Input Range 500kHz Sampling Frequencycapacitancetovoltage Converter using a Resonant LC Bridge
    DOI
    Hesam Omdeh Ghiasi, Sina Arjmandpour, Taekwang Jang
    ETH Zurich
  59. A-SSCC
    2024
    A 24% Efficient, 15.36 dBm Output Power, Multi-Standard Digital Polar Transmitter with 7-bit Phase Interpolator-based BFSK Modulator and 23 dB Sidelobe Suppressed PA for Low-Power Wide Area Networks
    DOI
    Hafiz Usman Mahmood, Keun-Mok Kim, Dinh Thinh Tran, Jinglong Xu, Abdul Qahir, Jinho Ko, Jusung Kim, Sang-Gug Lee, Kyung-Sik Choi
    Korea Advanced Institute of Science and Technology · Qualcomm · ETH Zurich · Hanbat National University · Seoul National University of Science and Technology
  60. A-SSCC
    2024
    A Fully Integrated 4:1 DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators Achieving 74.5% Peak Efficiency and 0.78W/mm² Peak Power Density
    DOI
    Donghyeok Cho, Taekwang Jang, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich
  61. CICC
    2024
    A Co-Integrated Optical Phased Array, Mach-Zehnder Modulator and Mm-Wave Driver for Free-Space Communication
    DOI
    Youngin Kim, Laurenz Kulmer, Killian Keller, Jeongsoo Park, Basem Abdelaziz Abdelmagid, Kyung-Sik Choi, Dongwon Lee, Yuqi Liu, Juerg Leuthold, Hua Wang
    ETH Zurich
  62. CICC
    2024
    A Mm-Wave Phase-Time Co-Apertured Transceiver Array with Beam Squinting Mitigation for Wideband Beamforming/Spatial-Nulling
    DOI
    Mohamed Eleraky, Jeongsoo Park, Basem Abdelaziz Abdelmagid, Naga Sasikanth Mannem, Hua Wang
    ETH Zurich · Georgia Institute of Technology
  63. CICC
    2024
    Challenges and Innovations in Fully Integrated DC-DC Converters for IoT and Modern Computing Platforms
    DOI
    Suyang Song, Alessandro Novello, Taekwang Jang
    ETH Zurich
  64. ESSERC
    2024
    A 1.2 mm2 416 mW 1.44 Mmat/s 64×16 Matrix Preprocessing ASIC for Massive MIMO in 22FDX
    DOI
    Darja Nonaca, Christoph Studer
    ETH Zurich
  65. ESSERC
    2024
    A 5.3-μW 80.8-dB SNDR LNA-Embedded EF-CIFF Third-Order Noise-Shaping SAR ADC for Closed-Loop Neural Recording
    DOI
    Yegeun Kim, Changhun Seok, Kyeongwon Jeong, Haidam Choi, Heewon Choee, Sohmyung Ha, Minkyu Je
    Korea Advanced Institute of Science and Technology · ETH Zurich · New York University Abu Dhabi
  66. ESSERC
    2024
    A CMOS Molecular Sensor for Personalized Diagnostics Featuring Enzyme-Free Reading and Encoding of Viral Variants at Single-Nucleotide Resolution
    DOI
    Marco Saif, Fuze Jiang, Hangxing Liu, Adam Wang, Zhikai Huang, Yuguo Sheng, Dongwon Lee, Thomas Burger, Hua Wang
    ETH Zurich · Integrated Systems Laboratory
  67. ESSERC
    2024
    Circuits and Systems for Embodied AI: Exploring uJ Multi-Modal Perception for Nano-UAVs on the Kraken Shield
    DOI
    Viviane Potocnik, Alfio Di Mauro, Lorenzo Lamberti, Victor Kartsch, Moritz Scherer, Francesco Conti, Luca Benini
    ETH Zurich · University of Bologna
  68. ESSERC
    2024
    SciDVS: A Scientific Event Camera with 1.7% Temporal Contrast Sensitivity at 0.7 lux
    DOI
    Rui Graca, Sheng Zhou, Brian McReynolds, Tobi Delbruck
    University of Zurich · ETH Zurich · Institute of Neuroinformatics
  69. ISSCC
    2024
    17.6 Fully Integrated CMOS Ferrofluidic Biomolecular Processing Platform with On-Chip Droplet-Based Manipulation, Multiplexing and Sensing
    DOI
    Dongwon Lee, Kyung-Sik Choi, Fuze Jiang, Hangxing Liu, Doohwan Jung, Ying Kong, Marco Saif, Zhikai Huang, Jing Wang, Hua Wang
    ETH Zurich · Qualcomm
  70. ISSCC
    2024
    32.10 A Compact Broadband VSWR-Resilient True-Power-and-Gain Sensor with Dynamic-Range Compensation for Phased-Array Applications
    DOI
    Edward Liu, David Munzer, Jeongseok Lee, Hua Wang
    ETH Zurich · Georgia Institute of Technology
  71. ISSCC
    2024
    32.9 An Ultra-Compact 28GHz Doherty Power Amplifier with an Asymmetrically-Coupled-Transformer Output Combiner
    DOI
    Edward Liu, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  72. JSSC
    2024
    A Broadband Four-Way Parallel–Series Doherty Power Amplifier for 5G Communications
    DOI
    Edward Liu, Hua Wang
    ETH Zurich
  73. JSSC
    2024
    A Highly Linear and Efficient V-Band CMOS Power Amplifier Using Hybrid NMOS/PMOS for Double Nonlinearity Cancellation With Four-Way Distributed-Active-Transformer
    DOI
    Tso-Wei Li, Sensen Li, Hossein Miri Lavasani, Hua Wang
    Samsung · The University of Texas at Austin · Case Western Reserve University · ETH Zurich
  74. JSSC
    2024
    A Jitter Programmable Digital Bang-Bang PLL Using PVT-Invariant Stochastic Jitter Monitor
    DOI
    Yong-Jo Kim, Taekwang Jang, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich
  75. JSSC
    2024
    A Sub-mm3 Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry
    DOI
    Jungho Lee, Joseph G. Letner, Jongyup Lim, Gabriele Atzeni, Jiawei Liao, Abhilasha Kamboj, Bhavika Mani, Seokhyeon Jeong, Yejoong Kim, Yi Sun, Beomseo Koo, Julianna Richie, Elena della Valle, Paras R. Patel, Dennis Sylvester, Hun-Seok Kim, Taekwang Jang, Jamie D. Phillips, Cynthia A. Chestek, James Weiland, David Blaauw
    University of Michigan · ETH Zurich · University of Delaware
  76. JSSC
    2024
    An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance
    DOI
    Gabriele Atzeni, Can Livanelioglu, Sina Arjmandpour, Taekwang Jang
    ETH Zurich
  77. JSSC
    2024
    Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2–8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing
    DOI
    Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggiman, Hayate Okuhara, Luca Benini
    University of Bologna · ETH Zurich · Integrated Systems Laboratory · National University of Singapore
  78. JSSC
    2024
    Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine
    DOI
    Arpan Suravi Prasad, Moritz Scherer, Francesco Conti, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini
    ETH Zurich · Integrated Systems Laboratory · University of Bologna · Universidad de Los Andes, Chile
  79. VLSI
    2024
    A 0.29pJ/Step Fully Discrete-Time Charge Domain Bridge-to-Digital Converter for Force Sensing in Spinal Implants Using RC Bridge
    DOI
    Tim Keller, Rosario Incandela, Xi Chen, Hesam Ghiasi, Mohsen Khodaee, Sina Arjmandpour, Jiawei Liao, H. Long, Tobias Goetschi, Jonas Widmer, Taekwang Jang
    ETH Zurich
  80. VLSI
    2024
    A Jammer-Mitigating 267 Mb/s 3.78mm2 583 mW $\mathbf{32}\times \mathbf{8}$ Multi-User MIMO Receiver in 22FDX
    DOI
    Florian Bucheli, Oscar Castañeda, Gian Marti, Christoph Studer
    ETH Zurich
  81. VLSI
    2024
    A Subcellular-Resolution Multimodal CMOS Biosensor Array with 16K Ion-Selective Pixels for Real-Time Monitoring Potassium Dynamics
    DOI
    Hangxing Liu, Fuze Jiang, Ying Kong, Dongwon Lee, Yuguo Sheng, Adam Wang, Zhikai Huang, Marco Saif, Thomas Burger, Jing Wang, Hua Wang
    ETH Zurich
  82. VLSI
    2024
    Highly Sensitive Multimodal CMOS Antifouling Sensor Array with Multi-Use Electrodes for Single-Cell-Level Profiling of Biophysical and Biochemical Parameters
    DOI
    Hangxing Liu, Fuze Jiang, Adam Wang, Zhikai Huang, Ying Kong, Marco Saif, Dongwon Lee, Thomas Burger, Jing Wang, Hua Wang
    ETH Zurich
  83. VLSI
    2024
    Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET
    DOI
    Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gürkaynak, Davide Rossi, Luca Benini
    ETH Zurich · Stanford University · University of Bologna
  84. A-SSCC
    2023
    A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor
    DOI
    Yong-Jo Kim, Taekwang Jang, SeongHwan Cho
    Korea Advanced Institute of Science and Technology · ETH Zurich
  85. CICC
    2023
    A High-Order-Temperature-Compensated 328kHz On Chip RC Timer Using Time-Interleaved Resistors Achieving 1.5pJ/Cycle and 5.86ppm°C
    DOI
    Jiawei Liao, Hesam Omdeh Ghiasi, Giorgio Cristiano, Taekwang Jang
    ETH Zurich
  86. ESSERC
    2023
    A 137-GHz Ultra-Wide Bandwidth High-Linearity CMOS Distributed Amplifier for High-Speed Communication
    DOI
    Dongwon Lee, Jeongsoo Park, Kyung-Sik Choi, Yuqi Liu, Hua Wang
    ETH Zurich
  87. ESSERC
    2023
    A 256-Channel In-Pixel Electrochemical Platform in CMOS for Rapid Isothermal Genetic Amplification and Screening
    DOI
    Hangxing Liu, Fuze Jiang, Dongwon Lee, Yuguo Sheng, Adam Wang, Marco Saif, Ying Kong, Zhikai Huang, Thomas Burger, Jing Wang, Hua Wang
    ETH Zurich · Institute of Environmental Engineering · Integrated Systems Laboratory
  88. ESSERC
    2023
    Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS
    DOI
    Moritz Scherer, Manuel Eggimann, Alfio Di Mauro, Arpan Suravi Prasad, Francesco Conti, Davide Rossi, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini
    ETH Zurich · University of Bologna · Meta
  89. ISSCC
    2023
    22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing
    DOI
    Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauer, Gian marco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini
    University of Bologna · ETH Zurich · Dolphin Design (France)
  90. ISSCC
    2023
    A CMOS Multi-Functional Biosensor Array for Rapid Low-Concentration Analyte Detection with On-Chip DEP-Assisted Active Enrichment and Manipulation with No External Electrodes
    DOI
    Dongwon Lee, Doohwan Jung, Fuze Jiang, Gregory Villiam Junek, Jongseok Park, Hangxing Liu, Ying Kong, Youngin Kim, Jing Wang, Hua Wang
    ETH Zurich · Qualcomm · Georgia Institute of Technology · Apple
  91. ISSCC
    2023
    An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches
    DOI
    Abdullah Serdar Yonar, Pier Andrea Francese, Matthias Brändli, Marcel Kossel, Mridula Prathapan, Thomas Morf, Andrea Ruffino, Taekwang Jang
    IBM · ETH Zurich
  92. JSSC
    2023
    A Portable CMOS-Based Spin Resonance System for High-Resolution Spectroscopy and Imaging
    DOI
    Daniel Krüger, Aoyang Zhang, Behdad Aghelnejad, Henry Hinton, Victor Marrugat Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham
    University of Stuttgart · Harvard University · Oxford Instruments (United Kingdom) · ETH Zurich · Meta · University of Macau
  93. JSSC
    2023
    A mm-Wave Frequency Modulated Transmitter Array for Superior Resolution in Angular Localization Supporting Low-Latency Joint Communication and Sensing
    DOI
    Naga Sasikanth Mannem, Elham Erfani, Tzu-Yuan Huang, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  94. JSSC
    2023
    Broadband mm-Wave Current/Voltage Sensing-Based VSWR-Resilient True Power/Impedance Sensor Supporting Single-Ended Antenna Interfaces
    DOI
    David Munzer, Naga Sasikanth Mannem, Jeongseok Lee, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  95. JSSC
    2023
    Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital–Analog Networks
    DOI
    Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · ETH Zurich · Institute of Neuroinformatics
  96. VLSI
    2023
    A 1,024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing
    DOI
    Woojun Choi, Yiyang Chen, Donghwan Kim, Sean Weaver, Tilman Schlotter, Can Livanelioglu, Jiawei Liao, Rosario Incandela, Parham Davami, Gabriele Atzeni, Sina Arjmandpour, Seong-Hwan Cho, Taekwang Jang
    ETH Zurich · Korea Advanced Institute of Science and Technology
  97. VLSI
    2023
    A 4.1W/mm² Peak Power Density and 77% Peak Efficiency Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators and a Resonant LC Flying Impedance in 22nm FDSOI CMOS
    DOI
    Alessandro Novello, Gabriele Atzeni, Tim Keller, Taekwang Jang
    ETH Zurich
  98. VLSI
    2023
    A Highly-Digital PWM-Based Impedance Monitoring IC with 143.2dB DR and 17.7fFrms Resolution
    DOI
    Hyeonho Han, Woojun Choi, Jaehyun Kim, Jaesuk Sung, Heon-Jin Choi, Youngcheol Chae
    Yonsei University · ETH Zurich
  99. VLSI
    2023
    A Wireless Neural Stimulator IC for Cortical Visual Prosthesis
    DOI
    Jungho Lee, Joseph Letner, Jongyup Lim, Yi Sun, Seokhyeon Jeong, Yejoong Kim, Beomseo Koo, Gabriele Atzeni, Jiawei Liao, Julianna Richie, Elena Della Valle, Paras Patel, Taekwang Jang, Cynthia Chestek, Jamie Phillips, James Weiland, Dennis Sylvester, Hun-Seok Kim, David Blaauw
    University of Michigan · ETH Zurich · University of Delaware
  100. VLSI
    2023
    An Energy-Efficient Impedance-Boosted Discrete-Time Amplifier Achieving 0.34 Noise Efficiency Factor and 389 MΩ Input Impedance
    DOI
    Gabriele Atzeni, Can Livanelioglu, Lavinia Recchioni, Sina Arjmandpour, Taekwang Jang
    ETH Zurich
  101. CICC
    2022
    A Compact Wideband Joint Bidirectional Class-G Digital Doherty Switched-Capacitor Transmitter and N-Path Quadrature Receiver through Capacitor Bank Sharing
    DOI
    Jeongseok Lee, Doohwan Jung, David Munzer, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  102. CICC
    2022
    Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions
    DOI
    Arindam Basu, Lei Deng, Charlotte Frenkel, Xueyong Zhang
    City University of Hong Kong · Chinese Institute for Brain Research · Tsinghua University · ETH Zurich · Institute of Neuroinformatics · Nanyang Technological University
  103. ESSERC
    2022
    A 283 pJ/b 240 Mb/s Floating-Point Baseband Accelerator for Massive MU-MIMO in 22FDX
    DOI
    Oscar Castaieda, Luca Benini, Christoph Studer
    ETH Zurich
  104. ESSERC
    2022
    A Joint Space/Time Modulation Lens-Coupled 230-GHz Terahertz Source with 40°/43°2-D Beam Steering for Fast High-Resolution Imaging/Sensing Applications
    DOI
    Hossein Jalili, Yuqi Liu, Tzu-Yuan Huang, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  105. ESSERC
    2022
    In-memory Realization of In-situ Few-shot Continual Learning with a Dynamically Evolving Explicit Memory
    DOI
    G. Karunaratne, M. Hersche, J. Langeneager, G. Cherubini, M. Le Gallo, U. Egger, K. Brew, S. Choi, I. Ok, C. Silvestre, N. Li, N. Saulnier, V. Chan, I. Ahsan, V. Narayanan, L. Benini, A. Sebastian, A. Rahimi
    ETH Zurich · IBM · IBM
  106. ISSCC
    2022
    A 23μW Solar-Powered Keyword-Spotting ASIC with Ring-Oscillator-Based Time-Domain Feature Extraction
    DOI
    Kwantae Kim, Chang Gao, Rui Graca, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu
    University of Zurich · ETH Zurich · Korea Advanced Institute of Science and Technology
  107. ISSCC
    2022
    A 26-to-39GHz Broadband Ultra-Compact High-Linearity Switchless Hybrid N/PMOS Bi-Directional PA/LNA Front-End for Multi-Band 5G Large-Scaled MIMO System
    DOI
    Jeongsoo Park, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  108. ISSCC
    2022
    A Broadband Mm-Wave VSWR-Resilient Joint True-Power Detector and Impedance Sensor Supporting Single-Ended Antenna Interfaces
    DOI
    David J. Munzer, Naga Sasikanth Mannem, Edgar Garay, Hua Wang
    Georgia Institute of Technology · ETH Zurich
  109. ISSCC
    2022
    A Second-Order Temperature-Compensated On-Chip R-RC Oscillator Achieving 7.93ppm/°C and 3.3pJ/Hz in -40°C to 125°C Temperature Range
    DOI
    Youngwoo Ji, Jiawei Liao, Sina Arjmandpour, Alessandro Novello, Jae-Yoon Sim, Taekwang Jang
    Pohang University of Science and Technology · ETH Zurich · Sharif University of Technology
  110. ISSCC
    2022
    ReckOn: A 28nm Sub-mm2 Task-Agnostic Spiking Recurrent Neural Network Processor Enabling On-Chip Learning over Second-Long Timescales
    DOI
    Charlotte Frenkel, Giacomo Indiveri
    University of Zurich · ETH Zurich
  111. JSSC
    2022
    A 0.9-V 28-MHz Highly Digital CMOS Dual-RC Frequency Reference With ±200 ppm Inaccuracy From −40 °C to 85 °C
    DOI
    Woojun Choi, Jan Angevare, Injun Park, Kofi A. A. Makinwa, Youngcheol Chae
    ETH Zurich · Delft University of Technology · Samsung · Yonsei University
  112. JSSC
    2022
    A 23-μW Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction
    DOI
    Kwantae Kim, Chang Gao, Rui Graca, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu
    Korea Advanced Institute of Science and Technology · ETH Zurich · Institute of Neuroinformatics
  113. JSSC
    2022
    A 510-pW 32-kHz Crystal Oscillator With High Energy-to-Noise-Ratio Pulse Injection
    DOI
    Li Xu, Taekwang Jang, Jongyup Lim, Kyojin David Choo, David Blaauw, Dennis Sylvester
    University of Michigan · ETH Zurich
  114. JSSC
    2022
    A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry
    DOI
    Jongyup Lim, Jungho Lee, Eunseong Moon, Michael Barrow, Gabriele Atzeni, Joseph G. Letner, Joseph T. Costello, Samuel R. Nason, Paras R. Patel, Yi Sun, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David Blaauw, Dennis Sylvester, Taekwang Jang
    University of Michigan · ETH Zurich · Michigan Medicine · University of Delaware
  115. JSSC
    2022
    A Miniaturized Wireless Neural Implant With Body-Coupled Power Delivery and Data Transmission
    DOI
    Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong-Hyun Ahn, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University · Incheon National University · ETH Zurich
  116. JSSC
    2022
    Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing
    DOI
    Kwantae Kim, Sangyeob Kim, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · University of Zurich · ETH Zurich · Institute of Neuroinformatics
  117. JSSC
    2022
    FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems
    DOI
    Surin Gweon, Sanghoon Kang, Kwantae Kim, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · ETH Zurich · Institute of Neuroinformatics
  118. JSSC
    2022
    Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode
    DOI
    Davide Rossi, Francesco Conti, Manuel Eggiman, Alfio Di Mauro, Giuseppe Tagliavini, Stefan Mach, Marco Guermandi, Antonio Pullini, Igor Loi, Jie Chen, Eric Flamand, Luca Benini
    University of Bologna · ETH Zurich
  119. VLSI
    2022
    A 0.0014 mm2, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits
    DOI
    Can Livanelioglu, Woojun Choi, Donghwan Kim, Jiawei Liao, Rosario Incandela, Giorgio Cristiano, Taekwang Jang
    ETH Zurich · Korea Advanced Institute of Science and Technology
  120. VLSI
    2022
    A 260×274 μm2 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink
    DOI
    Gabriele Atzeni, Jongyup Lim, Jiawei Liao, Alessandro Novello, Jungho Lee, Eunseong Moon, Michael Barrow, Joseph Letner, Joseph Costello, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David Blaauw, Taekwang Jang
    ETH Zurich · University of Michigan · University of Delaware
  121. VLSI
    2022
    An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
    DOI
    A. Serdar Yonar, Pier Andrea Francese, Matthias Brandli, Marcel Kossel, Thomas Morf, Jonathan E. Proesel, Sergey Rylov, Herschel Ainspan, Martin Cochet, Zeynep Deniz, Timothy Dickson, Troy Beukema, Christian Baks, Michael Beakes, John F. Bulzacchelli, Young-Ho Choi, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin
    ETH Zurich · IBM · IBM · Samsung
  122. VLSI
    2022
    An Impedance-boosted Switched-capacitor Low-noise Amplifier Achieving 0.4 NEF
    DOI
    Gabriele Atzeni, Rosario Incandela, Youngwoo Ji, Alessandro Novello, Hesam Ghiasi, Giorgio Cristiano, Jiawei Liao, Qiuting Huang, Taekwang Jang
    ETH Zurich
  123. VLSI
    2022
    Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing
    DOI
    Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · University of Zurich · ETH Zurich · Institute of Neuroinformatics