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大学University · インドIndia · 2022–2026 LIVE

Indian Institute of Technology Madras

世界World 25位 (0 pt) · 対象論文Papers 14

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

012342022 JSSC: 32022 CICC: 1420222023 ISSCC: 22023 ESSERC: 1320232024 JSSC: 2220242025 JSSC: 12025 CICC: 12025 ESSERC: 1320252026 ISSCC: 12026 JSSC: 122026
ISSCCJSSCCICCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC–2––1
JSSC3–211
CICC1––1–
ESSERC–1–1–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1310.66世界World #77
VLSI Tier 1000.00–
JSSC Tier 1743.97世界World #71
CICC Tier 2200.50世界World #85
A-SSCC Tier 2000.00–
ESSERC Tier 2222.00世界World #74

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. ISSCC
    2026
    Proactive Power Management-Based Supply Regulation with Online Learning for Variation-Tolerant Workload-Aware Droop Mitigation in 28nm CMOS
    DOI
    Xi Chen, Andrew Liss, William Covington, Qiankai Cao, Yiqi Li, Kang Wei, Raveesh Magod, Muhammad Khellah, Xin Zhang, Jie Gu
    Northwestern University · Texas Instruments · Indian Institute of Technology Madras · Intel · IBM
  2. JSSC
    2026
    A Self-Injection LC Oscillator for Flicker Noise Reduction
    DOI
    Bahram Jafari, Ali Ghafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar
    University of British Columbia · Indian Institute of Technology Madras
  3. CICC
    2025
    A 4.6-6GHz Self-Injection LC Oscillator Exploiting 2nd Harmonic Extraction and Self-Mixing to Achieve 5-35kHz 1/f3 Phase Noise Corner and 201dB FoMT
    DOI
    Bahram Jafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar
    University of British Columbia · Indian Institute of Technology Madras
  4. ESSERC
    2025
    A 68.5 Db SNDR, 50 MHz Bandwidth, $800 \text{MS}/\mathrm{s}$ Bandpass CT-Pipeline ADC in 65 Nm CMOS
    DOI
    Chaitanya Kumar, Shanthi Pavan
    Indian Institute of Technology Madras
  5. JSSC
    2025
    A 7-bit 1.75-GS/s 6.9-fJ/conv.-step FoMw Loop-Unrolled Fully Asynchronous SAR ADC in 3-nm CMOS for a 224-Gb/s SerDes Receiver
    DOI
    Chakravarti Bheemisetti, Karunanidhan Pandey, Idan Lotan, Gadi Ori, Ahmad Khairi, Yoel Krupnik, Udi Virobnik, Boyapati Subrahmanyam, Ariel Cohen, Nagendra Krishnapura
    Intel · Intel · Intel · Indian Institute of Technology Madras
  6. JSSC
    2024
    A 6 to 12-GHz Fractional-N Frequency Synthesizer With a Digital Technique to Counter Modulus-Dependent Feedback Divider Delays
    DOI
    Aditya Narayanan, Abhishek Bhat, Nagendra Krishnapura
    Indian Institute of Technology Madras · Cisco Systems (United States)
  7. JSSC
    2024
    Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining
    DOI
    Shanthi Pavan, Saravana Manivannan, Nishanth Basavaraj
    Indian Institute of Technology Madras · Indian Institute of Technology Roorkee
  8. ESSERC
    2023
    A 0.49-9.8 Gb/s 0.1-1V Output Swing Transmitter with 38.4MHz Reference and <30 ns Turn-On Time
    DOI
    Jaya Deepthi, Saurabh Saxena
    Indian Institute of Technology Madras
  9. ISSCC
    2023
    A 0.5-to-400MHz Programmable BAW Oscillator with Fractional Output Divider Achieving 4ppm Frequency Stability over Temperature and <95fs Jitter
    DOI
    Subhashish Mukherjee, Yogesh Darwhekar, Jayawardan Janardhanan, Peeyoosh Mirajkar, Raghavendra Reddy, Harish Ramesh, Bichoy Bahr, Jagdish Chand, Uday Meda, Baher Haroun, Shankar Karantha, Ernest Yen, Keegan Martin, Daniel Gan, Amin Sijelmassi, Sankaran Aniruddhan
    Texas Instruments · Texas Instruments · Indian Institute of Technology Madras
  10. ISSCC
    2023
    Bandpass Filter and Oscillator ICs with THD < -140dBc at 10Vppd for Testing High-Resolution ADCs
    DOI
    Subha Sarkar, Rajat Agarwal, Nagendra Krishnapura
    Indian Institute of Technology Madras · Texas Instruments
  11. CICC
    2022
    A 0.37mm2 250kHz-BW 95dB-SNDR CTDSM with Low-Cost 2nd-order Vector-Quantizer DEM
    DOI
    Wei Shi, Xing Wang, Xiyuan Tang, Abhishek Mukherjee, Raviteja Theertham, Shanthi Pavan, Lu Jie, Nan Sun
    The University of Texas at Austin · Tsinghua University · Peking University · Indian Institute of Technology Madras
  12. JSSC
    2022
    A 1.12–1.91 mW/GHz 2.46–4.92 GHz Cascaded Clock Multiplier in 65 nm CMOS
    DOI
    R. Gautam, Saurabh Saxena
    Indian Institute of Technology Madras
  13. JSSC
    2022
    Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier
    DOI
    R. S. Ashwin Kumar, Nagendra Krishnapura, Paramita Banerjee
    Indian Institute of Technology Madras · Indian Institute of Technology Kanpur
  14. JSSC
    2022
    Design of High-Resolution Continuous-Time Delta–Sigma Data Converters With Dual Return-to-Open DACs
    DOI
    Raviteja Theertham, Satya Narayana Ganta, Shanthi Pavan
    Analog Devices · MediaTek · Indian Institute of Technology Madras