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大学University · マカオMacau · 2022–2026 LIVE

University of Macau

世界World 3位 (66.5 pt) · 対象論文Papers 325

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0204060801002022 ISSCC: 62022 JSSC: 142022 CICC: 32022 A-SSCC: 62022 ESSERC: 33220222023 ISSCC: 172023 VLSI: 42023 JSSC: 162023 CICC: 82023 A-SSCC: 52023 ESSERC: 35320232024 ISSCC: 162024 VLSI: 22024 JSSC: 252024 CICC: 182024 A-SSCC: 92024 ESSERC: 47420242025 ISSCC: 172025 VLSI: 82025 JSSC: 282025 CICC: 172025 A-SSCC: 102025 ESSERC: 48420252026 ISSCC: 152026 VLSI: 112026 JSSC: 432026 CICC: 13822026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC617161715
VLSI–42811
JSSC1416252843
CICC38181713
A-SSCC65910–
ESSERC3344–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1715954.93世界World #2
VLSI Tier 1251616.49世界World #4
JSSC Tier 11269488.09世界World #2
CICC Tier 2594239.72世界World #2
A-SSCC Tier 2301919.07世界World #3
ESSERC Tier 21456.29世界World #8

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    A 0.039mm 2 Temperature-Robust 7.2GHz Fractional-N RO-PLL Achieving 257.9fs rms Jitter and −255.5dB FoM N
    DOI
    Haoran Li, Jinge Li, Shangmin Yu, Xiaoqi Lin, Xueying Jiang, Xi Meng, Pui-In Mak, Rui P. Martins, Jun Yin
    University of Macau
  2. CICC
    2026
    A 0.32-NEF, 0.08-PEF Discrete-Time Amplifier with Multi-Path kT/C Noise Cancellation in 180nm CMOS
    DOI
    Ke Hu, Jiangchao Wu, Xuanlin Chen, Zhao Wang, Hua Fan, Man-Kay Law
    University of Macau · University of Electronic Science and Technology of China
  3. CICC
    2026
    A 0.36μJ/Classification Intra- and Inter-Individually Insensitive PCG Monitoring SoC with Dynamic Framing and Reconfigurable Computing Array
    DOI
    Yuheng Wang, Hongzhi Zhao, Yuanzhe Zhao, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  4. CICC
    2026
    A 0.71-pJ/bit 64-Gb/s PAM-4 CDR Using a Charge-Calculated-Linear Phase Detector Achieving 12MHz JTOL @1UI and 361fs Recovered Clock in 28nm CMOS
    DOI
    Runchen Wang, Lingao Huang, Yu Lv, Ya Zhao, Guohe Zhang, Li Geng, Pui-In Mak, Chao Fan
    Xi'an Jiaotong University · University of Macau
  5. CICC
    2026
    A 10MHz All-1.2V-NMOS Battery-Input Single-Mode Hybrid Buck-Boost Converter in 65nm CMOS with Fast Transient Response
    DOI
    Wenjie Yang, Zhiguo Tong, Zhewen Yu, Yan Lu
    Tsinghua University · University of Macau
  6. CICC
    2026
    A 120A 48-60V to 0.8-1V Full Bridge Converter with Hybrid Current Doubler Rectifier Achieving 6.9% Heavy-Load Efficiency Enhancement
    DOI
    Zhiren Luo, Zeguo Liu, Yichao Ji, Ji Jin, Zikang Wang, Weiyi Tang, Hao Wang, Mo Huang, Lin Cheng
    University of Science and Technology of China · University of Macau
  7. CICC
    2026
    A 6V-to-1V ReSC-Hybrid Two-Stage Merged Buck Converter with an Ultra-Small Inductor for VPD
    DOI
    Zhibang Song, Zhiguo Tong, Junwei Huang, Zhongyao Zhu, Sai-Weng Sin, Yan Lu
    Tsinghua University · University of Macau
  8. CICC
    2026
    A 94.1% Peak Efficiency Coupled-Inductor Boost Converter with Small Inductor Current Ripple and Fast Transient Response
    DOI
    Shousheng Han, Junwei Huang, Fei Song, Zhiguo Tong, Sai-Weng Sin, Hanjun Jiang, Xiaoming Wu, Tianling Ren, Yan Lu
    University of Macau · Tsinghua University
  9. CICC
    2026
    A Buck-Based SIBO Converter with 5mV Load-Independent Vop Ripple and Enhanced Von Ripple Suppression for AMOLED Display
    DOI
    Zihao Tang, Jiacheng Yang, Rui P. Martins, Lin Cheng, Mo Huang
    University of Macau · University of Science and Technology of China
  10. CICC
    2026
    A RF Sub-Sampling ADC with Hierarchical Sharing Interleaver Achieving >34.5/41dB SNDR/SFDR for Up to 40GHz Ka-Band Inputs
    DOI
    Zijian Liu, Minglei Zhang, Yannan Zhang, Zehang Wu, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  11. CICC
    2026
    A Scalable Distributed 12-to-1V Fast-Slow Hybrid DC-DC Combo with Fast-Transient Bucklets and One-Pin Current Balancing
    DOI
    Junwei Huang, Xiangyu Mao, Zhiguo Tong, Zhewen Yu, Shousheng Han, Rui P. Martins, Yan Lu
    Tsinghua University · University of Electronic Science and Technology of China · University of Macau
  12. CICC
    2026
    An Output-Rail-Scalable Hybrid Buck Converter with Globally Adaptive Frequency Control Achieving 98.0% Peak Efficiency and 490 mW/mm 3 Power Density
    DOI
    Zhewen Yu, Junwei Huang, Zhiguo Tong, Zhongyao Zhu, Yan Lu
    Tsinghua University · University of Macau
  13. CICC
    2026
    Fully Integrated CSCR-based Single-Stage Piezoelectric Energy Harvesting Interface with Independent Positive-/Negative-Cycle MPPT
    DOI
    Guangshu Zhao, Chenxi Wang, Ningchao Lin, Hao Wu, Litao Zhang, Haoyang Sang, Man-Kay Law
    University of Macau
  14. ISSCC
    2026
    16.1 PV Energy-Harvesting Interface Using Reconfigurable Self-Clamp CSCR Converter Achieving 3.83× High-Efficiency VCR Ratio and Open-Voltage-Sense-Free MPPT
    DOI
    Ziyang Zhong, Rui P. Martins, Mo Huang
    University of Macau
  15. ISSCC
    2026
    16.6 A Parameter-Free Runtime-Energy-Loss Optimizer Achieving 2.15% Error in Energy-Recycling Duty-Cycled Systems
    DOI
    Jianxin Yang, Rui P. Martins, Mo Huang
    University of Macau
  16. ISSCC
    2026
    16.8 A Battery Charger Based On Mesh-Connection 2×CF Continuously-Scalable-Conversion-Ratio Converter Achieving $\mathbf{3. 2 W} / \mathbf{m m}^{\mathbf{3}}$ Power Density
    DOI
    Yuanfei Wang, Zhiyuan Zhang, Yihan Zhang, Rui P. Martins, Mo Huang
    University of Macau · Hong Kong University of Science and Technology
  17. ISSCC
    2026
    25.10 A 65nm 0.066pJ/b Floating-Latch-Based True Random Number Generator Resilient to Power-Noise Injection Attacks
    DOI
    Kai Cheng, Yunbo Huang, Zunsong Yang, Li Wang, Hongyu Ren, Xiaoyu Shan, Pui-In Mak, Yong Chen, Bo Li
    Chinese Academy of Sciences · University of Macau · Tsinghua University
  18. ISSCC
    2026
    26.1 Coupled-OSC-Based Converters Achieving 89.5% Peak Efficiency at 61MHz, 1.82W/mm 2 Power Density at 360MHz, and Inherent Even Phase Interleaving
    DOI
    Jianxin Yang, Fuyao Zhang, Rui P. Martins, Mo Huang
    University of Macau
  19. ISSCC
    2026
    26.5 An Inductor-at-Middle Hybrid Buck Converter with Shared Power-Signal Path for Distributed Vertical Power Delivery
    DOI
    Zhongyao Zhu, Junwei Huang, Zhibang Song, Zhewen Yu, Shousheng Han, Sai-Weng Sin, Yan Lu
    Tsinghua University · University of Macau
  20. ISSCC
    2026
    27.5 A $17.9-\text{to}-22.4 \text{GHz} 195.6 \pm 1.3 \text{dBc} / \text{Hz}$ FoM Quad-Core Class-F −1 VCO Featuring Improved Synchronization Using a Circular Pentafilar Transformer-Based Tank
    DOI
    Yue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Jinge Li, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  21. ISSCC
    2026
    27.9 A Dual-Mode DCO-PA with a Twisted 8-Shape Inductor for BLE Achieving 42% TX Efficiency at 1.6dBm and 0.29mW RX Clock
    DOI
    Jiawen Chen, Kai Xu, Luyi Guo, Teerachot Siriburanon, Jun Yin, Bashir M. Al-Hashimi, Robert Bogdan Staszewski
    University College Dublin · King's College London · University of Macau
  22. ISSCC
    2026
    A 0.068mm 2 8.5-to-12.7GHz Complementary Dual-Core VCO with Auto-2 nd -Harmonic-Tracking Technique Achieving 202.7dBc/Hz Peak FoM T and 0.9dB-FoM Variation at a 1MHz Offset in a 39.6% Tuning Range
    DOI
    Xincheng Du, Xiangxun Zhan, Tincheng Ou, Zaize Chen, Jinge Li, Haoran Li, Zhizhan Yang, Zhuo Xu, Pui-In Mak, Rui P. Martins, Jun Yin
    University of Macau · Southwest Jiaotong University
  23. ISSCC
    2026
    A 0.6V 9.4µW 1,892µm 2 Current-Pulse-Injection Crystal Oscillator Featuring Capacitively Biased Amplifier with 242.2dBc/Hz PN FoM @1KHz Offset
    DOI
    Haihua Li, Dan Shi, Qi Zhou, Rui Martins, Pui-In Mak, Ka-Meng Lei
    University of Macau
  24. ISSCC
    2026
    A 103.9dB-SFDR 83.8dB-SNDR 3MHz-BW Multi-Bit Quadratic-Exponential Noise-Coupled IDSM with High Tolerance to DAC Non-Linearity
    DOI
    Zhensheng Li, Biao Wang, Mingqiang Guo, Rui P. Martins, Sai-Weng Sin
    University of Macau
  25. ISSCC
    2026
    A Compact Dual-Capacitor Relay SPT Supply Modulator with Overshoot-Free Adaptive on-Time Control for 5G FR2 CMOS PA
    DOI
    Zhewen Yu, Zhiguo Tong, Junwei Huang, Jun Yin, Yan Lu
    Tsinghua University · University of Macau
  26. ISSCC
    2026
    A Multi-Phase Hybrid Converter with Q Samplers Enabling Simultaneous IL Auto-Balance and Arbitrary Phase Count
    DOI
    Jiacheng Yang, Zihao Tang, Rui P. Martins, Mo Huang
    University of Macau
  27. ISSCC
    2026
    An Integrated Voltage and Current Reference Together Achieving 5.7 and 9.1ppm/°C from −40 to 125°C
    DOI
    Lele Fang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  28. ISSCC
    2026
    VoxCAD: A 0.82-to-81.0mW Intelligent 3D-Perception dToF SoC with Sector-Wise Voxelization and High-Density Tri-Mode eDRAM CIM Macro
    DOI
    Haoyang Sang, Zhao Wang, Longzhen He, Guangshu Zhao, Wenao Xie, Bo Wang, Rui P. Martins, Man-Kay Law
    University of Macau · Korea Advanced Institute of Science and Technology · Hamad bin Khalifa University
  29. JSSC
    2026
    A 0.4-V 32-kHz Pulse-Injection Temperature-Compensated Crystal Oscillator With Sub-Cycle C L Modulation and DLL-Reused Temperature Sensor
    DOI
    Haihua Li, Pui-In Mak, Rui P. Martins, Ka-Meng Lei
    University of Macau
  30. JSSC
    2026
    A 0.5--2.5-GS/s Resettable Ring-VCO-Based ADC Eliminating Quantization-Noise Shaping
    DOI
    Tao Lu, Zixiang Liu, Hao Yang, Sai-Weng Sin, Fujiang Lin, Liheng Lou, Robert Bogdan Staszewski, Yizhe Hu
    University of Science and Technology of China · University of Macau · University College Dublin
  31. JSSC
    2026
    A 1.6-GS/s 13.9-mW 80.2-dB SFDR Single-Channel Pipelined ADC With Dual-Phase Hybrid Amplification
    DOI
    Hongjiang Chen, Jingxiang Wang, Kaize Zhang, Shizhan Mo, Liang Qi, Chao Zhao, Hao Zhang, Zhang Zhang, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · Shanghai Jiao Tong University · Hefei University of Technology
  32. JSSC
    2026
    A 100+Gb/s 252–283-GHz RF-Amplifier-Integrated TX/RX Chipset in Standard 65-nm Bulk CMOS
    DOI
    Zhicheng Lin, Hiu Lok Tam, Hao Guo, Xiaoyue Xia, Zijun Guo, Kam Man Shum, Pui-In Mak, Chi Hou Chan
    City University of Hong Kong · University of Macau
  33. JSSC
    2026
    A 12-bit 1-GS/s Single-Channel Pipelined ADC With Open-Loop Floating Inverter Amplifier and Residue-Dependent Integration Time Compensation
    DOI
    Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · Shanghai Jiao Tong University
  34. JSSC
    2026
    A 22.4–25.6-GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage Level and Balanced 2nd Harmonic Extraction
    DOI
    Yunbo Huang, Zunsong Yang, Hongyu Ren, Rui P. Martins, Yan Lu, Nan Sun, Nan Qi, Bo Li, Yong Chen
    University of Macau · Chinese Academy of Sciences · Tsinghua University
  35. JSSC
    2026
    A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference
    DOI
    Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Haitao Wang, Qihao Liu, Zhiming Chen, Hao Wu, Jinshan Yue, Shidong Lv, Xinghua Wang, Pui-In Mak, Xiaoran Li, Feng Zhang
    Chinese Academy of Sciences · Beijing Institute of Technology · University of Macau
  36. JSSC
    2026
    A 28-nm Hybrid-Domain Outer Product-Based Floating-Point SRAM Computing-in-Memory Macro With Logarithm Bit-Width Residual ADC for Edge AI
    DOI
    Yiyang Yuan, Zhongyi Sun, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Hao Wu, Haitao Wang, Qihao Liu, Chengying Chen, Jinshan Yue, Pui-In Mak, Feng Zhang
    Beijing Institute of Technology · Xiamen University of Technology · University of Macau
  37. JSSC
    2026
    A 28-nm PVT Inner-Tracking Time-Domain Compute-In-Memory Macro for Edge-AI Devices
    DOI
    Yuanzhe Zhao, Yuheng Wang, Heng Xie, Zijian Wang, Rui P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  38. JSSC
    2026
    A 4100-μm 2 Wire-Metal-Based Temperature Sensor With a Fractional-Discharge FLL and a V2T Converter With ±0.2 °C Inaccuracy (3σ) From –40 °C to 125 °C and 45-fJ·K 2 Resolution FoM in 28-nm CMOS
    DOI
    Dan Shi, Rui P. Martins, Pui-In Mak, Ka-Meng Lei
    University of Macau
  39. JSSC
    2026
    A 436--472 GHz 4-Element IF Beamforming Phased-Array Receiver in 65-nm CMOS
    DOI
    Hao Guo, Hao-Tao Hu, Zhicheng Lin, Zijun Guo, Xiaoyue Xia, Kaizhe Guo, Kam Man Shum, Pui-In Mak, Chi Hou Chan
    City University of Hong Kong · University of Macau
  40. JSSC
    2026
    A 5.2 μ W, 2-to-8-Channel Scalable, Speaker-Tracking Microphone Array Featuring a CNN-Defined Analog Front-End
    DOI
    Shuliang Pan, Wei-Han Yu, Fei Tan, Jixuan Li, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau · École Polytechnique Fédérale de Lausanne
  41. JSSC
    2026
    A 6.4-GS/s, 200-MHz BW 77.3-dB DR 71.5-dB SNDR 2× TI Extrapolated CT DSM Employing Broadband Hybrid-Inputs Adder and Nonlinearity-Suppression DAC Encoder
    DOI
    Yuekai Liu, Yichen Jin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Zhichao Tan, Guoxing Wang, Liang Qi
    Shanghai Jiao Tong University · University of Macau · Zhejiang University
  42. JSSC
    2026
    A 94.8-nW Battery-Free Intelligent Silicon Platform for Distributed Multimodal Sensing With Adaptive and Event-Driven Computing
    DOI
    Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau · Southwest Jiaotong University
  43. JSSC
    2026
    A Coupled-OSC-Based Multi-Phase DC–DC Converter for High-Frequency Power Delivery
    DOI
    Jianxin Yang, Fuyao Zhang, Cheng Huang, Rui P. Martins, Mo Huang
    University of Macau
  44. JSSC
    2026
    A Fast-Slow Two-Module High-Power-Density DC–DC Solution With Transient and Efficiency Improvements
    DOI
    Junwei Huang, Zhiguo Tong, Xiangyu Mao, Chi-Seng Lam, Rui P. Martins, Yan Lu
    University of Macau · Chinese Academy of Sciences
  45. JSSC
    2026
    A Hierarchical-Hybrid Floating-Point Compute-in-Memory Macro Using FP-DAC and FP-ADC for Edge-AI Devices
    DOI
    Yuanzhe Zhao, Yang Wang, Rui P. Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang
    University of Macau · Tsinghua University
  46. JSSC
    2026
    A Hybrid SCVR With 4 × C F Continuously Scalable-Conversion Ratio SC Stage
    DOI
    Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Fuyao Zhang, Yihan Zhang, Rui P. Martins, Mo Huang
    University of Macau · Hong Kong University of Science and Technology
  47. JSSC
    2026
    A LEGO-Like Easy-Stacking SC Boost Converter
    DOI
    Shousheng Han, Fei Song, Zhongyao Zhu, Sai-Weng Sin, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu
    Tsinghua University · University of Macau
  48. JSSC
    2026
    A Line-Connected Q-Sampler-Based Multi-Phase Hybrid Converter
    DOI
    Jiacheng Yang, Zihao Tang, Rui P. Martins, Zheng Wang, Lin Cheng, Mo Huang
    University of Macau · University of Electronic Science and Technology of China · University of Science and Technology of China
  49. JSSC
    2026
    A Low Phase Noise and High-Efficiency Biharmonic Class-F −1 VCO With Improved Waveform Shaping
    DOI
    Yue Wu, Yatao Peng, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  50. JSSC
    2026
    A Low-Jitter mm-Wave Fractional-N Sub-Sampling PLL Using a Polarity-Reversible SSPD for DTC Range Reduction
    DOI
    Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Pui-In Mak, Rui P. Martins, Jun Yin
    University of Macau
  51. JSSC
    2026
    A Low-Quiescent-Current, Low-Ripple Hybrid Converter With Efficient Energy Recycling for Low-Duty-Cycle SoCs
    DOI
    Jianxin Yang, Cheng Huang, Rui P. Martins, Xin Ming, Bo Zhang, Mo Huang
    University of Macau · University of Electronic Science and Technology of China
  52. JSSC
    2026
    A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT
    DOI
    Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui P. Martins, Pui-In Mak
    University of Macau
  53. JSSC
    2026
    A Monolithic GaN Driver With Power-Rail Charging Saturation Bootstrap Technique Achieving Enhanced Slew Rate and Gate Rise/Fall Time Ratio of 1.28
    DOI
    Yao Qin, Xin Ming, Chun-Wang Zhuang, Zhi-Yi Lin, Mo Huang, Zhao-Ji Li, Bo Zhang
    University of Electronic Science and Technology of China · State Key Laboratory of Electronic Thin Films and Integrated Devices · University of Macau
  54. JSSC
    2026
    A Multi-Band RF Transmitter Employing a Transformer-Based N-Path Switched-Capacitor Modulator for CIM 3 Suppression
    DOI
    Gengzhen Qi, Pui-In Mak
    Sun Yat-sen University · University of Macau
  55. JSSC
    2026
    A Multi-Channel Thermoelectric Energy Harvesting Interface Realizing Uneven-Input MPPT and 62-mV Start-Up
    DOI
    Yunzhe Yang, Mo Huang, Sijun Du
    Delft University of Technology · University of Macau
  56. JSSC
    2026
    A Multi-Frequency-Excited MIMO Radar Array Architecture Enabling Exponential-Order Improvement in Angular Resolution
    DOI
    Ruilin Liao, Haoran Wang, Jingzhi Zhang, Wei-Han Yu, Yue Song, Hongyang An, Huihua Liu, Kai Kang
    University of Electronic Science and Technology of China · University of Macau
  57. JSSC
    2026
    A Multiband 4th-Order RF Transmitter Featuring an N-Path-Filter Modulator With a Switched g m --C Network
    DOI
    Gengzhen Qi, Pui-In Mak
    Sun Yat-sen University · University of Macau
  58. JSSC
    2026
    A Nesting-Connected Reconfigurable SC Converter With Fine-Grained Conversion Ratios and Increased Output Conduction Paths for On-Chip Surround Power Delivery
    DOI
    Xuchu Mu, Yang Jiang, Xin Ming, Bo Zhang, Rui P. Martins, Pui-In Mak
    University of Macau · University of Electronic Science and Technology of China
  59. JSSC
    2026
    A Reconfigurable Self-Clamp CSCR Converter With Fast-Converging MPPT for Energy Harvesting
    DOI
    Ziyang Zhong, Sijun Du, Cheng Huang, Rui P. Martins, Mo Huang
    University of Macau · Delft University of Technology
  60. JSSC
    2026
    A Segment-Interlace Multi-Phase Hybrid Converter With Concurrent Inductor Energizing and Inherent Current Balancing
    DOI
    Jiacheng Yang, Zihao Tang, Xin Ming, Rui P. Martins, Mo Huang
    University of Macau · University of Electronic Science and Technology of China · State Key Laboratory of Electronic Thin Films and Integrated Devices
  61. JSSC
    2026
    A Single-Channel 1–3 MASH SAR-Assisted Pipeline ADC With Residue Amplifier Error Shaping
    DOI
    Yanbo Zhang, Guolong Fu, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    Xidian University · University of Macau
  62. JSSC
    2026
    A Single-Stage CSCR-Based SIDO/DISO Converter With Almost-Lossless Path Switching
    DOI
    Yuanfei Wang, Yan Lu, Ping Luo, Rui P. Martins, Mo Huang
    University of Macau · University of Electronic Science and Technology of China
  63. JSSC
    2026
    A Single-Stage Wireless Power Transmitter With Boosted and Regulated AC Output Voltage for D2D Wireless Fast Charging
    DOI
    Fangyu Mao, Xiaofei Li, Rui P. Martins, Yan Lu
    University of Macau
  64. JSSC
    2026
    A Third-Harmonic-Enhanced Triple-Push DCO Utilizing Source-Combining Technique
    DOI
    Qiyao Jiang, Zhuo Xu, Quan Pan, Pui-In Mak, Rui P. Martins, Jun Yin
    University of Macau · Southern University of Science and Technology
  65. JSSC
    2026
    A Topology-Level Hybrid High-VCR Input-Parallel–Output-Series Step-Up DC–DC Converter for Flyweight Applications
    DOI
    Shousheng Han, Zanfeng Fang, Zhiguo Tong, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu
    Tsinghua University · University of Macau
  66. JSSC
    2026
    A Valuewise Hybrid-Domain Compute-In-Memory Macro for Energy-Efficient Edge-AI Devices
    DOI
    Yuanzhe Zhao, Yang Wang, Yuheng Wang, Rui P. Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang
    University of Macau · Tsinghua University
  67. JSSC
    2026
    AFP-CIM: All-Inclusive Floating-Point With Segmented Compute-in-Memory Macro
    DOI
    Yi Zhan, Wei-Han Yu, Ka-Fai Un, Zongsheng Li, Haoming Chu, Yuxiang Huan, Ning Ma, Li-Rong Zheng, Rui P. Martins, Pui-In Mak
    University of Macau · Guangdong Institute of Intelligence Science and Technology
  68. JSSC
    2026
    Design and Analysis of Windmill-Shaping-Geometry Eight-Phase Oscillator Incorporating Magnetic and Dual-Injection Coupling Techniques
    DOI
    Ya Zhao, Runchen Wang, Lingao Huang, Haitao Ren, Jun Yin, Pui-In Mak, Li Geng, Chao Fan
    Xi'an Jiaotong University · University of Macau
  69. JSSC
    2026
    Falcon: Event-Driven Hybrid Object Tracking SoC With Bit-Column-Similarity-Based MRAM PIM and Heterogeneous Read-Only-Once Attention Flow
    DOI
    Wenao Xie, Haoyang Sang, Zhamaliddin Kalzhan, Jingu Lee, Jerald Yoo, Kangho Lee, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · University of Macau · Seoul National University · Samsung
  70. JSSC
    2026
    One-Cycle-Balance Control in Buck Converters for Consecutive Load-Step Events
    DOI
    Zihao Tang, Jiacheng Yang, Rui P. Martins, Mo Huang
    University of Macau
  71. JSSC
    2026
    Phase-Scalable CF-Cross-Connected-Based Hybrid DC-DC Converter With Auto VCF Balancing and Inactive CF Charging
    DOI
    Jiacheng Yang, Tingxu Hu, Yan Lu, Xin Ming, Rui P. Martins, Mo Huang
    University of Macau · University of Electronic Science and Technology of China · State Key Laboratory of Electronic Thin Films and Integrated Devices
  72. VLSI
    2026
    0.144mm 2 Fully-Integrated-Onchip Fast-Converging Background Calibrations for 3-Stage 70.5dB-DR CT Pipelined ADC in 28nm CMOS
    DOI
    Kai Xing, Zi-Xuan Xu, Xiang-Hui Pan, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  73. VLSI
    2026
    A $3.2 \text{GS} / \mathbf{s}^{2}{ }^{\text {nd }}$-Order Noise-Shaping-Pipelined ADC with 400 MHz-BW 69 dB-SNDR Featuring Gain/Quantizer-Embedded Parallel Voltage/Time-Domain Loop Filter
    DOI
    Yuhang Peng, Shizhan Mo, Liang Qi, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · Shanghai Jiao Tong University
  74. VLSI
    2026
    A 0.0257 mm 2 , 1.16 µW, Mask-Efficient KWS SoC with Hybrid Cap-ROM-IMC/SRAM-NMC and Transfer Learning for Flexible Multi-Keyword Recognition
    DOI
    Fei Tan, Zhongyu Zhao, Wei-Han Yu, Ka-Fai Un, Jiawei Xu, Yingzhe Hu, Mahsa Shoaran, Rui P. Martins, Pui-In Mak
    University of Macau · École Polytechnique Fédérale de Lausanne
  75. VLSI
    2026
    A 12-Bit 4-GS/s ADC with PLL-Based Sub-Ranging RO-TDC
    DOI
    Yimeng Wang, Xinyang Di, Jingxiang Wang, Hongjiang Chen, Ran Zhang, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau
  76. VLSI
    2026
    A 14b 500MS/s Pipelined-SAR ADC with Loop-Unrolled Correlated Level Shifting and Rapid Sequential Sampling
    DOI
    Yong Huo, Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui. P. Martins, Chi-Hang Chan
    University of Macau
  77. VLSI
    2026
    A 19.4mW 2.5GS/s Pipelined-SAR ADC Achieving 60.8dB SNDR Employing a Dual-Zero-Compensation Ring Amplifier
    DOI
    Jingxiang Wang, Kaize Zhang, Xiuyuan Zhao, Hongjiang Chen, Haoyu Li, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau
  78. VLSI
    2026
    A 2D-Extendable $\mathbf{4 8 V}$-1V Ladder-Series-Capacitor Buck Converter for Computing Power Delivery
    DOI
    Zhiguo Tong, Wenjie Yang, Zhewen Yu, Shousheng Han, Rui P. Martins, Yan Lu
    Tsinghua University · University of Macau
  79. VLSI
    2026
    A 54-to-60GHz Cascaded PLL Featuring Implicit Frequency Doubling and Harmonic-Mixing Phase Detector Achieving 53.8fs rms Jitter and −281.1dB FoM N
    DOI
    Yunbo Huang, Zunsong Yang, Li Wang, Kai Cheng, Hongyu Ren, Xiaoyu Shan, Pui-In Mak, Yong Chen, Bo Li
    Chinese Academy of Sciences · University of Macau · Tsinghua University
  80. VLSI
    2026
    A 64-Channel, Low-Power End-to-End Transformer-Based BCI SoC for Efficient Motion Intention Decoding
    DOI
    Fei Tan, Raphael Berner, Zhongyu Zhao, Yuhan Xie, Amirmahdi Joudi, Yiheng Fu, Icare Sakr, Thibault Collin, Vincent Rouanne, Henri Lorach, Ka-Fai Un, Pui-In Mak, Jocelyne Bloch, Gregoire Courtine, Mahsa Shoaran
    École Polytechnique Fédérale de Lausanne · University of Macau
  81. VLSI
    2026
    A Compact Magnetically Coupled Dual-Mode Class-F −1 VCO Covering 5.8−9.97 GHz with 196.2 dBc/Hz FoM and 70-320 kHz 1/f 3 Corner Without Harmonic Tuning
    DOI
    Yue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Wenhua Gong, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  82. VLSI
    2026
    A Universal Piezoelectric Energy-Harvesting Interface with Machine Learning-Based Excitation Identification and Cross-Topology MPPT for Diverse Input Vibrations
    DOI
    Guangshu Zhao, Haoyang Sang, Chenxi Wang, Hao Wu, Litao Zhang, Ningchao Lin, Kaixue Ma, Rui P. Martins, Man-Kay Law
    University of Macau · Tianjin University
  83. A-SSCC
    2025
    A 0.014mm 2 Phase-Detector-less Ring-Oscillator-based Multiplying Delay-Locked Loop with 8.8fS RMS -Jitter and -250.2dB FoM J
    DOI
    Yueduo Liu, Rongxin Bao, Xinyu Yang, Zihao Zhu, Zhenyu Tan, Wubo Qin, Hongshuai Zhang, Xiangyu Mao, Jiaxin Liu, Zheng Wang, Jun Yin, Pui-In Mak, Shiheng Yang
    University of Electronic Science and Technology of China · University of Macau
  84. A-SSCC
    2025
    A 22nm 38.9TFLOPS/W Computing-on-BENES-Network LLM Processor with Redundant Weight-bits Elimination and Key-Value Computing Reformulation
    DOI
    Yang Wang, Hu Anyu Wang, Xiaolong Yang, Yubin Qin, Wende Xu, Ruiqi Guo, Zhiheng Yue, Minglei Zhang, Hu Iming Han, Shaojun Wei, Yang Hu, Shouyi Yin
    Tsinghua University · University of Macau
  85. A-SSCC
    2025
    A 28nm PVT Inner-Tracking Time-Domain Compute-InMemory Macro Featuring Scalable Global Timer and Reconfigurable Pipelined Cascading for Edge-Al Devices
    DOI
    Yuanzhe Zhao, Yuheng Wang, Yan Zhu, Rui P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  86. A-SSCC
    2025
    A 3.4 mW 64.5 dB SNDR 800MS/s Pipelined-SAR/TDC ADC with Parallel Amplification and Quantization
    DOI
    Baolong Huang, Hongjiang Chen, Jingxiang Wang, Yutao Peng, Zhifei Lu, Xizhu Peng, He Tang, Liang Qi, Yawei Guo, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · University of Electronic Science and Technology of China · Shanghai Jiao Tong University · Foton Motors (China)
  87. A-SSCC
    2025
    A 45W 12-40V Input 94.4% Peak Efficiency Simultaneous 1S/2S Battery Charging and PoL Supply Hybrid Converter with Flying Capacitor Floating Technique and Duty-Cycle Lockout-Release Operations
    DOI
    Xiongjie Zhang, Xinman Li, Qiaobo Ma, Huihua Li, Yang Jiang, Yan Lu, Rui Martins, Pui-In Mak
    University of Macau · Tsinghua University
  88. A-SSCC
    2025
    A 94.6%/98.6% Peak Power/System Efficiency SIDO/DISO SC DC-DC Converter with Cross Regulation Suppression and Fast DVS for Load Stacking Applications
    DOI
    Feiyu Li, Qishen Fang
    University of Macau
  89. A-SSCC
    2025
    A Single-Channel 12b 400 MS/s Asynchronous MultiBit/Cycle SAR ADC Emulating Single-Bit/Cycle-Like Properties with a 5.2b Digital Slope Quantizer
    DOI
    Hongzhi Zhao, Bingxiang Hu, Minglei Zhang, R. P. Martins, Yan Zhu, Chi-Hang Chan
    University of Macau
  90. A-SSCC
    2025
    An 8-32 V-Input SiP-Integrated 58 W/15A Octuple-StepDown Resonant Converter with Soft-Input/-Output Conduction and ZVS Using 4-Phase Coupled Inductor
    DOI
    Jiahao Shi, Xiangan You, Qiaobo Ma, Jian Song, Xiongjie Zhang, Qidong Wang, Yang Jiang, Rui P. Martins, Pui-In Mak
    University of Macau · Chinese Academy of Sciences
  91. A-SSCC
    2025
    An 80.2dB-SNDR 15MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC Based on Sturdy MASH Topology
    DOI
    Qihui Zhang, Yan Zhu, R. P. Martins, Chi-Hang Chan
    University of Macau
  92. A-SSCC
    2025
    On-Chip Surround Power Delivery Using 25-Ratio SC DCDC Converter with 0.35-3.3V Output Range Achieving 92.3% Peak Efficiency
    DOI
    Xuchu Mu, Yang Jiang, Xin Ming, Bo Zhang, Rui P. Martins, Pui-In Mak
    University of Macau · University of Electronic Science and Technology of China
  93. CICC
    2025
    25-nA Modified Hybrid Ladder Converter with Efficient Output-Capacitor Charge Recycling and 90% Battery Lifetime Extension
    DOI
    Jianxin Yang, Rui Paulo Martins, Mo Huang
    University of Macau
  94. CICC
    2025
    A 0.0022 mm2, 2 GS/s Resettable VCO-Based ADC With-out Quantization Noise Shaping
    DOI
    Tao Lu, Zixiang Liu, Hao Yang, Sai-Weng Sin, Robert Bogdan Staszewski, Fujiang Lin, Liheng Lou, Yizhe Hu
    University of Science and Technology of China · University of Macau · University College Dublin
  95. CICC
    2025
    A 12.5GS/s 14.7mW 4×TI Pipelined Hybrid TD-SAR ADC with Residual Time-Voltage Amplification
    DOI
    Haoyu Li, Boyang Wang, Hongjiang Chen, Sai-Weng Sin, Yutao Peng, Xizhu Peng, He Tang, Chao Fan, Liang Qi, Rui P. Martins, Mingqiang Guo
    University of Macau · University of Electronic Science and Technology of China · Xi'an Jiaotong University · Shanghai Jiao Tong University
  96. CICC
    2025
    A 16-bit Incremental ADC Enabled by An Efficient Shooting Integrator with Inherent Noise Reduction
    DOI
    Bo Wang, Amine Bermak, Man-Kay Law
    Hamad bin Khalifa University · University of Macau
  97. CICC
    2025
    A 22.4-25.6GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage and Balanced 2nd Harmonic Extraction Achieving 45.8fsrms Jitter and -254.3dB FoM
    DOI
    Yunbo Huang, Zunsong Yang, Hongyu Ren, Rui P. Martins, Yan Lu, Nan Sun, Nan Qi, Yong Chen
    University of Macau · Chinese Academy of Sciences · Tsinghua University
  98. CICC
    2025
    A 28nm Value-Wise Hybrid-Domain Compute-in-Memory Macro with Heterogeneous Memory Fabric and Asynchronous Sparsity Manager
    DOI
    Yuanzhe Zhao, Yang Wang, Yuheng Wang, Heng Xie, Yan Zhu, R. P. Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang
    University of Macau · Tsinghua University
  99. CICC
    2025
    A 300-kHz 3-Level Flyback Converter Achieving 93% Peak Efficiency and 50% Reduction in Transformer Size
    DOI
    Yuanzhuo Wu, Rui Paulo Martins, Mo Huang
    University of Macau
  100. CICC
    2025
    A 30V Step-Up Regulator with Shunt-Current-Reuse Controller for >85% Efficiency over 200µA-100mA Loading Range
    DOI
    Yue Zhao, Pengda Qu, Guangshu Zhao, Feng Luo, Yang Jiang, Zhiming Xiao
    Nankai University · University of Macau
  101. CICC
    2025
    A 30–110V Resonant Buck-Boost Power-Bus Charger Achieving 50-A Peak Laser-Current Pulse Generation in 2ns for MHz-Frequency Automotive LiDAR Transmitter
    DOI
    Hangxiao Ma, Qiaobo Ma, Xuchu Mu, Yang Jiang, Rui Martins, Pui-In Mak
    University of Macau
  102. CICC
    2025
    A 48x OSR 105.4-dB SNDR 24-kHz BW CT Zoom ADC with Reset Tri-level DWA and On-chip Negative-R Calibration
    DOI
    Yuyu Lin, Yan Zhu, R. P. Martins, Chi-Hang Chan
    University of Macau
  103. CICC
    2025
    A 98.5% Peak Efficiency 2/3-Phase Buck-or-Boost Converter With VCR-Independent Loss Optimization and Unconditional RHP Zero Elimination Achieving 2.76A/mm2-Current-Density and 6.5µs Recovery
    DOI
    Xiongjie Zhang, Xinman Li, Yang Jiang, Zhangming Zhu, Rui Martins, Pui-In Mak
    University of Macau · Xidian University
  104. CICC
    2025
    A Fast-transient Buck Converter with One-Cycle-Balancing Control for Single and Consecutive Load Steps
    DOI
    Zihao Tang, Rui Paulo Martins, Mo Huang
    University of Macau
  105. CICC
    2025
    A LEGO-Like Easy-Stacking Step-Up SC Converter with Ultra-High and Wide VCR Using All Input-Stress-Only Devices
    DOI
    Shousheng Han, Fei Song, Zhongyao Zhu, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu
    Tsinghua University · University of Macau
  106. CICC
    2025
    A One-Shot Floating-Point Compute-in-Memory Macro Featuring PVT Robustness and Mismatch Tolerance for Edge LLMs
    DOI
    Yuanzhe Zhao, Heng Xie, Zijian Wang, Chunlin Tian, Li Li, Yan Zhu, R. P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  107. CICC
    2025
    A Reconfigurable 0.69-1.02nJ/Classification Biomedical AI Processor for Intelligent Health Monitoring Devices
    DOI
    Yuanzhe Zhao, Yuheng Wang, Zijian Wang, Yan Zhu, R. P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  108. CICC
    2025
    An SC-first Hybrid SCVR with 4xCF Continuously Scalable-Conversion Ratio SC Achieving 92.5% Peak Efficiency
    DOI
    Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Yihan Zhang, Rui Paulo Martins, Mo Huang
    University of Macau · Hong Kong University of Science and Technology
  109. CICC
    2025
    Where is the Inductor: A Review and Comparison of the Hybrid DC-DC Buck Topologies
    DOI
    Zhiguo Tong, Wenjie Yang, Shousheng Han, Junwei Huang, Xiangyu Mao, Yan Lu
    Tsinghua University · University of Macau
  110. ESSERC
    2025
    A 0.05mm 2 18.5-to-38.6 GHz Injection-Locked Frequency Multiplier Incorporating Injection-Spurisolation FTL and Single-Transformer Quad-Mode VCO Achieving -121.7DBc/Hz PN @1Mhz in 55nm CMOS
    DOI
    Ya Zhao, Yihui Liu, Xu Liu, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng, Chao Fan
    Xi'an Jiaotong University · University of Macau
  111. ESSERC
    2025
    A 12-Bit 1-Gs/S 5.1-mW Pipelined ADC Using an Open-Loop Floating Inverter Amplifier with Residue-Dependent Integration Time Compensation
    DOI
    Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · Shanghai Jiao Tong University
  112. ESSERC
    2025
    A Bidirectional Buck/Buck Hybrid Converter Achieving 96.3% Charging and 91.4% Discharging Peak Efficiency for Alkaline-to-Li-Ion Replacement
    DOI
    Xuan Wu, Caiyu Tong, Yan Lu, Mo Huang, Yuan Gao
    Southern University of Science and Technology · Tsinghua University · University of Macau
  113. ESSERC
    2025
    A Multiband 4 th -Order RF Transmitter Featuring an N-Path-Filter Modulator with a Switched g m -C Network Achieving 230MHz Signal Bandwidth
    DOI
    Gengzhen Qi, Yunchu Li, Shaolin Liao, Pui-In Mak
    Sun Yat-sen University · University of Macau
  114. ISSCC
    2025
    14.5 A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and Inference
    DOI
    Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Shidong Lv, Hao Wu, Cailian Ma, Ming Li, Jinshan Yue, Xinghua Wang, Guozhong Xing, Pui-In Mak, Xiaoran Li, Feng Zhang
    Chinese Academy of Sciences · Beijing Institute of Technology · University of Macau
  115. ISSCC
    2025
    19.7 A 27GHz Fractional-N Sub-Sampling PLL Achieving $57.9\mathbf{fs}_{\text{rms}}$ Jitter, −249.7dB FoM, and $\mathbf{1.98\mu} \mathbf{S}$ Locking Time Using Polarity-Reversible SSPD
    DOI
    Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  116. ISSCC
    2025
    21.3 A Segmented-Interlacing Multi-Phase Hybrid Converter with Inherently Auto-Balanced ILs and Boosted IL Slew Rate During Load Transients
    DOI
    Jiacheng Yang, Rui P. Martins, Mo Huang
    University of Macau
  117. ISSCC
    2025
    21.9 A 20MHz & 1MHz Dual-Loop Non-Uniform-Multi-Inductor Hybrid DC-DC Converter with Specified Inductor Current Allocation and Fast Transient Response
    DOI
    Junwei Huang, Xiangyu Mao, Zhiguo Tong, Zhewen Yu, Wenjie Yang, Chi-Seng Lam, Rui P. Martins, Yan Lu
    University of Macau
  118. ISSCC
    2025
    24.3: A PVT-Robust 2× Interleaved 2.2GS/s ADC with Gated-CCRO-Based Quantizer Shared Across Channels and Steps Achieving >4.5GHz ERBW
    DOI
    Junlin Zhong, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  119. ISSCC
    2025
    24.4 A 10b 3GS/s Time-Domain ADC with Mutually Exclusive Metastability Correction and Wide Common-Mode Input
    DOI
    Zijian Liu, Minglei Zhang, Wei Zhang, Yan Zhu, Rui P. Martins, Chi–Hang Chan
    University of Macau
  120. ISSCC
    2025
    24.5 A 72GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3dB SFDR at 20GHz/Nyquist Inputs in 16nm FinFET
    DOI
    Yannan Zhang, Minglei Zhang, Zehang Wu, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  121. ISSCC
    2025
    27.5: A $4,\ 100\mu\mathrm{m}^{2}$ Wire-Metal-Based Temperature Sensor with a Fractional-Discharge FLL and a Time-Domain Amplifier with $\pm 0.2^{\circ}\mathrm{C}$ Inaccuracy $(3\sigma)$ from −40 to $125^{\circ}\mathrm{C}$ and $45\text{fJ}\cdot \mathrm{K}^{2}$ Resolution FoM in 28nm CMOS
    DOI
    Dan Shi, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  122. ISSCC
    2025
    31.4 A 91.25% Peak Power-Conversion-Efficiency Capacitive Power-Management IC Supporting up to 5.68mJ Burst Energy Delivery Using a Single External Capacitor for mm-Scale IoT Applications
    DOI
    Qishen Fang, Feiyu Li, Rui P. Martins, Man-Kay Law
    University of Macau
  123. ISSCC
    2025
    32.1 A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments
    DOI
    Tian Xia, Qiujin Chen, Shujing Wang, Rui P. Martins, Mo Huang
    University of Macau
  124. ISSCC
    2025
    9.10 A 93%-Peak-Efficiency Battery-Input 12-to-36V-Output Inductor-in-the-Middle Hybrid Boost Converter with Continuous Input and Output Currents and Fast Transient with No RHP Zero
    DOI
    Yifan Jiang, Yan Lu, Tiantian Tang, Junmin Jiang
    Southern University of Science and Technology · University of Macau
  125. ISSCC
    2025
    A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C
    DOI
    Yueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin, Pui-In Mak, Shiheng Yang
    University of Electronic Science and Technology of China · University of Macau · Fudan University
  126. ISSCC
    2025
    A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge
    DOI
    Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  127. ISSCC
    2025
    A Bi-Directional Dual-Path Boost-48V-Buck Hybrid Converter for High-Voltage Power-Transmission Cable in Light-Weight Humanoid Robots
    DOI
    Wenjie Yang, Zhiguo Tong, Junwei Huang, Rui P. Martins, Yan Lu
    University of Macau
  128. ISSCC
    2025
    A PVT-Robust 5.5GHz Fractional-N Cascaded RO-Based Digital PLL with Voltage-Domain Feedforward Noise Cancellation
    DOI
    Yu Duan, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  129. ISSCC
    2025
    An 85-to-230VAC to 3.3-to-4.6VDc 1.52W Capacitor-Drop Sigma-Floating-SC AC-DC Converter with 81.3% Peak Efficiency
    DOI
    Fei Song, Shousheng Han, Rui P. Martins, Yan Lu
    University of Macau
  130. ISSCC
    2025
    HOOP: A Scalable Hybrid DC-DC Converter Ring for High-Performance Computing
    DOI
    Zhiguo Tong, Zhewen Yu, Junwei Huang, Xiangyu Mao, Bernhard Wicht, Rui P. Martins, Yan Lu
    University of Macau · Leibniz University Hannover
  131. JSSC
    2025
    A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC Calibration
    DOI
    Rui Luo, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  132. JSSC
    2025
    A 1.52-W Capacitor-Drop Sigma-Floating-SC AC/DC Converter for Grid Power to IoT Devices
    DOI
    Fei Song, Shousheng Han, Rui P. Martins, Yan Lu
    University of Macau
  133. JSSC
    2025
    A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM
    DOI
    Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau
  134. JSSC
    2025
    A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering
    DOI
    Ke Li, Haoyu Gong, Congzhou Xianyu, Zhensheng Li, Liang Qi, Mingqiang Guo, Rui P. Martins, Sai-Weng Sin
    University of Macau · Shanghai Jiao Tong University
  135. JSSC
    2025
    A 2.5–5-V Input 100-V Output 86.2% Peak Efficiency Fibonacci-Dickson Hybrid Converter for Acoustic Surface Audio Driver
    DOI
    Yifan Jiang, Yan Lu, Chen Hu, Junmin Jiang
    Southern University of Science and Technology · University of Macau
  136. JSSC
    2025
    A 28-nm 19.9-to-258.5-TOPS/W 8b Digital Computing-in-Memory Processor With Two-Cycle Macro Featuring Winograd-Domain Convolution and Macro-Level Parallel Dual-Side Sparsity
    DOI
    Hao Wu, Yong Chen, Yiyang Yuan, Jinshan Yue, Xinghua Wang, Xiaoran Li, Feng Zhang
    Chinese Academy of Sciences · University of Macau · Beijing Institute of Technology
  137. JSSC
    2025
    A 320-MHz NS TD-ADC-Assisted C/DT Hybrid Pipelined ADC With Single OTA Second-Order RAF
    DOI
    Kai Xing, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  138. JSSC
    2025
    A 72-GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3-dB SFDR at 20-GHz/Nyquist Inputs in 16-nm FinFET
    DOI
    Yannan Zhang, Minglei Zhang, Zehang Wu, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  139. JSSC
    2025
    A 76.9 ppm/K Nano-Watt PVT-Insensitive CMOS Voltage Reference Operating From 4 to 300 K for Integrated Cryogenic Quantum Interface
    DOI
    Jing Wang, Jun He, Man-Kay Law, Xinzhe Wang, Futian Liang, Lin Cheng
    University of Science and Technology of China · University of Macau
  140. JSSC
    2025
    A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell
    DOI
    Haochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  141. JSSC
    2025
    A Bi-Directional Dual-Path Boost–Buck Hybrid Converter for High-Voltage Power Transmission Delivery Cable in Humanoid Robots
    DOI
    Wenjie Yang, Zhiguo Tong, Junwei Huang, Rui P. Martins, Yan Lu
    University of Macau · Chinese Academy of Sciences
  142. JSSC
    2025
    A Bidirectional USB Power Delivery Voltage-Regulating Cable
    DOI
    Zhiguo Tong, Junwei Huang, Xiangyu Mao, Rui P. Martins, Yan Lu
    University of Macau
  143. JSSC
    2025
    A Compact Low-Power 16 b SAR ADC Using Reservoir-Charge-Redistributed DAC and Configurable FIA-Based Comparator
    DOI
    Chenxi Yuan, Xianghui Pan, Zihao Zheng, Yan Song, Rui P. Martins, Yan Zhu, Chi-Hang Chan
    University of Macau
  144. JSSC
    2025
    A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment
    DOI
    Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui P. Martins, Pui-In Mak, Edoardo Charbon
    University of Macau · École Polytechnique Fédérale de Lausanne · ETH Zurich
  145. JSSC
    2025
    A Double Pulse Overlapping Laser Diode Driver With Minimum 100-ps Pulse for LiDAR System
    DOI
    Zhiguo Tong, Junwei Huang, Xiangyu Mao, Rui P. Martins, Yan Lu
    University of Macau
  146. JSSC
    2025
    A Dual-Inductor Quad-Path Hybrid Buck (2L4PHB) Converter With Reduced Inductor Current
    DOI
    Wen-Liang Zeng, Guigang Cai, Yan Lu, Sai-Weng Sin, Rui P. Martins, Chi-Seng Lam
    University of Macau · The Hong Kong University of Science and Technology (Guangzhou)
  147. JSSC
    2025
    A Miniature Multinuclei NMR/MRI Platform With a High-Voltage SOI ASIC
    DOI
    Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  148. JSSC
    2025
    A Multi-Path Inductor-First Inductor-on-Ground Switched-Capacitor Hybrid DC-DC Converter
    DOI
    Junwei Huang, Zhiguo Tong, Chi-Seng Lam, Xiangyu Mao, Rui P. Martins, Yan Lu
    University of Macau
  149. JSSC
    2025
    A Shoot-Through-Free 180-MHz Isolated Converter With PG-Downsized PA for Low EMI
    DOI
    Tian Xia, Qiujin Chen, Jiacheng Yang, Shujing Wang, Tingxu Hu, Rui P. Martins, Mo Huang
    University of Macau
  150. JSSC
    2025
    A Single-Channel 12-b 2-GS/s PVT-Robust Pipelined ADC With Sturdy Ring Amplifier and Time-Domain Quantizer
    DOI
    Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  151. JSSC
    2025
    A Single-Input RF Energy-Harvesting Interface With Compensated-CEPE Control and 3-D Hill-Climbing MPPT Achieving −28.5-dBm Sensitivity
    DOI
    Qiujin Chen, Tian Xia, Tingxu Hu, Yuanfei Wang, Yan Lu, Rui P. Martins, Mo Huang
    University of Macau
  152. JSSC
    2025
    A Three-Fine-Level Buck–Boost Hybrid Converter Achieving Half-VIN-Stress on All Switches and Fast Transient Response
    DOI
    Shuangxing Zhao, Chenchang Zhan, Zhaobo Zhang, Xianglong Bai, Chenyu Huang, Yan Lu
    Southern University of Science and Technology · University of Macau
  153. JSSC
    2025
    A VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio Switched- Capacitor Converter
    DOI
    Yuanfei Wang, Mo Huang, Qiujin Chen, Rui P. Martins, Yan Lu
    University of Macau
  154. JSSC
    2025
    An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm 2 Memory-Utilization-Aware CNN Accelerator Featuring a Memory Stationary Dataflow
    DOI
    Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui-In Mak
    University of Macau
  155. JSSC
    2025
    An Emulated Curve Assisted Fast-Transient Buck Converter With One-Cycle Charge Balance
    DOI
    Zihao Tang, Yan Lu, Rui P. Martins, Mo Huang
    University of Macau
  156. JSSC
    2025
    An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC With Dual-Path Time-Assisted Residue Generation Scheme
    DOI
    Junyan Hao, Minglei Zhang, Zijian Liu, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau · Xidian University
  157. JSSC
    2025
    An Isolated DC-DC Converter With Full-Duplex Communication Using a Single Pair of Transformers
    DOI
    Tingxu Hu, Yan Lu, Rui P. Martins, Mo Huang
    University of Macau
  158. JSSC
    2025
    High-Efficiency Ultrasound Energy Harvesting Interface With Auto-Calibrated Timing Control From −25 °C to 85 °C
    DOI
    Guangshu Zhao, Chao Xie, Chenxi Wang, Milin Zhang, Man-Kay Law
    University of Macau · Tsinghua University
  159. VLSI
    2025
    A $5.2\mu \mathrm{W}$, 2-to-8-Channel Scalable, Speaker-Tracking Microphone Array Featuring a CNN-Defined AFE
    DOI
    Shuliang Pan, Wei-Han Yu, Fei Tan, Jixuan Li, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau · École Polytechnique Fédérale de Lausanne
  160. VLSI
    2025
    A 0.06mm2 14.7-to-20.2GHz Quad-Core VCO Enabled by the Folded Circular Transformer Achieving 201.1dBc/Hz FoMT and 203.4dBc/Hz FoMA
    DOI
    Tincheng Ou, Kunpeng Hu, Hao Xu, Junjie Gu, Yizhuo Wang, Junyan Bi, Wenpeng He, Zhiwei Xu, Man-Kay Law, Na Yan
    Fudan University · Zhejiang University · University of Macau
  161. VLSI
    2025
    A 24-MHz Crystal Oscillator with 6.9-µs Startup Time and 2% Injection- $\Delta$ F Tolerance Using Phase-Interpolator-Assisted Synchronized Injection
    DOI
    Xin Wang, Zixuan Wang, Ka-Meng Lei, Shanhu Wang, Jiafei Yao, Zhikuang Cai, Pui-In Mak, Yufeng Guo
    Nanjing University of Posts and Telecommunications · University of Macau
  162. VLSI
    2025
    A 9.1mW All-5V-CMOS Series-Capacitor AC-DC Converter with CF Reallocation Operations for 85-230VRMS Mains Achieving 85.6% Efficiency at 858mW/cm3 Density
    DOI
    Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui Martins, Pui-In Mak
    University of Macau
  163. VLSI
    2025
    A CRYO-CMOS RF-DAC Based Super-Heterodyne Transmitter for Superconducting Qubit Control
    DOI
    Fengen Yuan, Hao Su, Yating Zou, Yatao Peng, Jun Yin, Fei Yan, Edoardo Charbon, Rui P. Martins, Pui-In Mak
    University of Macau · École Polytechnique Fédérale de Lausanne · Beijing Academy of Quantum Information Sciences
  164. VLSI
    2025
    A PVT-Robust $\text{16GS}/\mathrm{s} 4 \times \text{TI}$ Time-Domain ADC with Vernier-Based Multipath Flash TDC Achieving $25.7 \text{fJ} / \mathrm{c}-\mathrm{s}$ FoM in 28nm CMOS
    DOI
    Haoyu Li, Kaize Zhang, Liang Qi, Sai-Weng Sin, Rui P. Martins, Mingqiang Guo
    University of Macau · Shanghai Jiao Tong University
  165. VLSI
    2025
    A Single-Channel 14B 3GS/s Pipelined ADC in 28nm Technology
    DOI
    Buhui Rui, Xianghui Pan, Yao Lu, Yan Zhu, R. P. Martins, Chi-Hang Chan
    University of Macau
  166. VLSI
    2025
    Matryoshka CSCR: A Reconfigurable Matryoshka-Stacked Continuous-Scalable-Conversion-Ratio Switched-Capacitor DC-DC Converter with 0.1-to-1.7V Input
    DOI
    Yunzhe Yang, Wenyu Peng, Mo Huang, Sijun Du
    Delft University of Technology · University of Macau
  167. A-SSCC
    2024
    A 0.9V CMOS Voltage Reference with 0.41% Untrimmed Accuracy and 44.7 ppm/°C TC from -35°C to 130°C
    DOI
    Xuanlin Chen, Jiangchao Wu, Bo Wang, Man Kay Law
    University of Macau · Hamad bin Khalifa University
  168. A-SSCC
    2024
    A 14.7mW Blocker-Tolerant Wideband Receiver Using a Transformer-Based N-Path Passive-LNA and a 2nd-Order TIA Achieving 110MHz RF-BW and 13dBm OB-IIP3
    DOI
    Gengzhen Qi, Pui-In Mak
    Sun Yat-sen University · University of Macau
  169. A-SSCC
    2024
    A 320MHz BW NS TD-ADC Assisted C/DT Hybrid Pipelined ADC with SAB-based Residue Amplifying Filter
    DOI
    Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
    University of Macau
  170. A-SSCC
    2024
    A 33.6nW Capacitively Coupled Chopper Amplifier with Stacked Input-Boosted Gate-and-Bulk-Driven Inverter Achieving 0.59 NEF and 0.42 PEF in 180nm CMOS
    DOI
    Ke Hu, Jiangchao Wu, Bo Wang, Man Kay Law
    University of Macau · Hamad bin Khalifa University
  171. A-SSCC
    2024
    A 5.76GS/s 180MHz-BW 74.1dB-DR 2x TI Extrapolated CT DSM with Broadband Hybrid-Inputs Current-Mode Adder in 28nm CMOS
    DOI
    Yuekai Liu, Meng Guo, Yichen Jin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Zhichao Tan, Liang Qi
    Shanghai Jiao Tong University · University of Macau · Zhejiang University
  172. A-SSCC
    2024
    A Compact Low-power 16b SAR ADC using Reservoir-Charge-Redistributed DAC and Configurable Floating-Inverter-Based Comparator
    DOI
    Chenxi Yuan, Xianghui Pan, Zihao Zheng, Yan Song, R. P. Martins, Yan Zhu, Chi-Hang Chan
    University of Macau
  173. A-SSCC
    2024
    A Wide Current Range and Fast Transient Flipped Voltage Follower Based Low Dropout Regulator
    DOI
    Chunlei Qin, Wing-Hung Ki, Man-Kay Law
    Hong Kong University of Science and Technology · University of Macau
  174. A-SSCC
    2024
    An All-digital, 3.68 mV/LSB Voltage Sensor based Droop Prediction and Fast Mitigation System in 28nm CMOS
    DOI
    Yuxuan Du, Kaize Zhou, Zhuo Chen, Lishuo Deng, Tuo Li, Yan Lu, Weiwei Shan
    Southeast University · University of Macau
  175. A-SSCC
    2024
    Compact Hybrid Strong SOIPUF Exploiting Secret Key Generation and Dual-Edge Response Extraction for Enhanced Modeling Attack Resistance
    DOI
    Litao Zhang, Chongyao Xu, Man Kay Law
    University of Macau
  176. CICC
    2024
    A 0.144 mm212.5-16GHz PVT-Tolerant Dual-Path Offset-Charge-Pump-Based Fractional-N PLL Achieving 72.9 fSRMs Jitter, -271.5dB FoMN, and Sub-10% Jitter Variation
    DOI
    Xinyu Shen, Zhao Zhang, Yong Chen, Yixi Li, Yidan Zhang, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Macau
  177. CICC
    2024
    A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS
    DOI
    Jiangchao Wu, Ke Hu, Xuanlin Chen, Pui In Mak, Rui P. Martins, Man Kay Law
    University of Macau · University of Lisbon
  178. CICC
    2024
    A 1.58-nA CEPE-Based Hill-Climbing MPPT Technique with Compensated Ton Achieving 67.3% Efficiency at 10-nA Lload and > 97% MPPT Efficiency at VCR from 2 to 6
    DOI
    Qiujin Chen, Tian Xia, Tingxu Hu, Yuanfei Wang, Mo Huang, Rui. P. Martins, Yan Lu
    University of Macau
  179. CICC
    2024
    A 12V-to-PoL CCC-Based Easy-Scalable Multiple-Phase Hybrid Converter with Auto VCF Balancing and Inactive CF Charging
    DOI
    Jiacheng Yang, Tingxu Hu, Mo Huang, Rui. P. Martins, Yan Lu
    University of Macau
  180. CICC
    2024
    A 15MHz-BW 82.7dB-SNDR 98.8dB-SFDR Pipelined MASH 2–2 CT DSM in 65nm CMOS
    DOI
    Xinyu Qin, Yichen Jin, Guoxing Wang, Sai-Weng Sin, Maurits Ortmanns, Yong Lian, Liang Qi
    Shanghai Jiao Tong University · University of Macau · Universität Ulm · York University
  181. CICC
    2024
    A 160MHz-BW 68dB-SNDR 30.8mW Continuous-Time Pipeline DSM with Correlative Passive Low-Pass Filters and DAC Image Pre-Filtering
    DOI
    Ke Li, Xianyu Congzhou, Liang Qi, Mingqiang Guo, Rui P. Martins, Sai-Weng Sin
    University of Macau · Shanghai Jiao Tong University · University of Lisbon · Instituto Superior Técnico
  182. CICC
    2024
    A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC
    DOI
    Pengyu He, Yuanzhe Zhao, Heng Xie, Yang Wang, Shouyi Yin, Li Li, Yan Zhu, R. P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau · Tsinghua University · Instituto Superior Técnico
  183. CICC
    2024
    A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS
    DOI
    Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui P. Martins, Quan Pan
    University of Macau · Southern University of Science and Technology
  184. CICC
    2024
    A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from −25 to 85°C
    DOI
    Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui P. Martins, Man-Kay Law
    University of Macau · Tsinghua University · Instituto Superior Técnico
  185. CICC
    2024
    A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter
    DOI
    Haoyu Gong, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui Paulo Martins, Sai-Weng Sin
    University of Macau · University of Lisbon · Instituto Superior Técnico
  186. CICC
    2024
    A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation
    DOI
    Huihua Li, Qiaobo Ma, Yang Jiang, Rui Martins, Pui-In Mak
    University of Macau · University of Lisbon
  187. CICC
    2024
    A Cryogenic Double-IF SSB Controller with Image Suppression and On-Chip Filtering implemented in 130nm SiGe BiCMOS Technology for Superconducting Qubit Control
    DOI
    Yatao Peng, Jad Benserhir, Yating Zou, Edoardo Charbon
    University of Macau · École Polytechnique Fédérale de Lausanne
  188. CICC
    2024
    A Fast-Slow Two-Module DC-DC Solution with Transient and Efficiency Improvements for 2.5D/3D Integration
    DOI
    Junwei Huang, Zhiguo Tong, Xiangyu Mao, Chi-Seng Lam, Rui. P. Martins, Yan Lu
    University of Macau
  189. CICC
    2024
    A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm3Density
    DOI
    Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Martins, Pui-In Mak
    University of Macau · University of Lisbon
  190. CICC
    2024
    A PVT-Robust 8b 20GS/s Time-Interleaved SAR ADC with Quantization-Embedded Current-Mode Buffer and Differ-Based Dither Timing Skew Calibration
    DOI
    Wei Zhang, Minglei Zhang, Yan Zhu, R. P. Martins, Chi-Hang Chan
    University of Macau · Instituto Superior Técnico
  191. CICC
    2024
    A Quad-Output Hybrid Buck Converter with 8-Inductor Helping One Spot from All Quarters for Multi-Core XPUs
    DOI
    Xiangyu Mao, Junwei Huang, Zhiguo Tong, Rui Martins, Yan Lu
    University of Macau
  192. CICC
    2024
    An Emulated Peak/Valley Curve Assisted Fast-Transient Buck Converter Achieving Precise One-Cycle Charge Balance with One-Parameter Calibration
    DOI
    Zihao Tang, Mo Huang, Rui Paulo Martins, Yan Lu
    University of Macau
  193. CICC
    2024
    The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs
    DOI
    Chi-Hang Chan, Minglei Zhang, Yuefeng Cao, Hongzhi Zhao, Rui P. Martins, Yan Zhu
    University of Macau · University of Lisbon
  194. ESSERC
    2024
    A -28.5-dBm Sensitivity RF Energy Harvesting Interface with 3-D MPPT Achieving > 98% MPPT Accuracy and Good Temperature Consistency
    DOI
    Qiujin Chen, Mo Huang, Tian Xia, Tingxu Hu, R. P. Martins, Yan Lu
    University of Macau
  195. ESSERC
    2024
    A 54.6-65.1 GHz Multi-Path-Synchronized 16-Core Oscillator Achieving -131.4 dBc/Hz PN and 195.8 dBc/Hz FoMT at 10 MHz Offset in 65nm CMOS
    DOI
    Xiangxun Zhan, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  196. ESSERC
    2024
    A Type-II Reference-Sampling PLL with Non-Uniform Octuple-Sampling Phase Detector Achieving 55-fs JitterRMS, –91.9-dBc Reference Spur and –259-dB Jitter-Power FOM
    DOI
    Hongyu Ren, Yunbo Huang, Zunsong Yang, Tianle Chen, Xianghe Meng, Weiwei Yan, Weidong Zhang, Zhongmao Li, Tetsuya Iizuka, Pui-In Mak, Yong Chen, Bo Li
    Chinese Academy of Sciences · University of Macau · 東京大学The University of Tokyo · Tsinghua University
  197. ESSERC
    2024
    An 80W Single-Inductor DC-DC Architecture for Simultaneous Flash Charging and Dual-Output PoL Supply with 92.1% Peak Efficiency from 15V-to-28V Input to 12.6V/3.3V/1V Outputs Using 1.3mm3 Inductor
    DOI
    Xiongjie Zhang, Anyang Zhao, Xinman Li, Yang Jiang, Rui P. Martins, Pui-In Mak
    University of Macau
  198. ISSCC
    2024
    10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment
    DOI
    Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon · Instituto Superior Técnico
  199. ISSCC
    2024
    17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm 3 Resolution
    DOI
    Shuhao Fan, Qi Zhou, Ka Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  200. ISSCC
    2024
    17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM
    DOI
    Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon
  201. ISSCC
    2024
    19.4 A 0.07 mm2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10 MHz and 200.7dBc/Hz FoMA in 65nm CMOS
    DOI
    Ya Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng
    Xi'an Jiaotong University · University of Macau
  202. ISSCC
    2024
    22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer
    DOI
    Yuefeng Cao, Minglei Zhang, Yan Zhu, R. P. Martins, Chi-Hang Chan
    University of Macau · University of Lisbon · Instituto Superior Técnico
  203. ISSCC
    2024
    23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCO
    DOI
    Haijun Shao, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon
  204. ISSCC
    2024
    27.1 A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-Go
    DOI
    Fangyu Mao, Rui Martins, Yan Lu
    University of Macau
  205. ISSCC
    2024
    28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output
    DOI
    Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon
  206. ISSCC
    2024
    3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC Calibration
    DOI
    Rui Luo, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  207. ISSCC
    2024
    31.5 A 750mW, 37% Peak Efficiency Isolated DC-DC Converter with 54/18Mb/s Full-Duplex Communication Using a Single Pair of Transformers
    DOI
    Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu
    University of Macau · University of Lisbon
  208. ISSCC
    2024
    31.6 A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel Switching
    DOI
    Yuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu
    University of Macau · University of Lisbon
  209. ISSCC
    2024
    34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC
    DOI
    Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · Beijing Institute of Technology · University of Macau
  210. ISSCC
    2024
    6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D Inpainting
    DOI
    Chaorui Zou, Yaozhong Ou, Yan Zhu, R. P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau · Instituto Superior Técnico
  211. ISSCC
    2024
    7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference Spur
    DOI
    Yunbo Huang, Yong Chen, Zunsong Yang, Rui P. Martins, Pui-In Mak
    University of Macau · Chinese Academy of Sciences · Instituto Superior Técnico
  212. ISSCC
    2024
    8.10 A 5V-to-150V Input-Parallel Output-Series Hybrid DC-DC Boost Converter Achieving 76.4mW/mg Power Density and 80% Peak Efficiency
    DOI
    Shousheng Han, Zanfeng Fang, Zhiguo Tong, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu
    University of Macau · Tsinghua University
  213. ISSCC
    2024
    8.4 A Fast-Transient 3-Fine-Level Buck-Boost Hybrid DC-DC Converter with Half-Voltage-Stress on All Switches and 98.2% Peak Efficiency
    DOI
    Shuangxing Zhao, Chenchang Zhan, Yan Lu
    University of Macau · Southern University of Science and Technology
  214. JSSC
    2024
    A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS
    DOI
    Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon
  215. JSSC
    2024
    A 1024-Channel 268-nW/Pixel 36×36 μm 2 /Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain–Computer Interfaces
    DOI
    Moonhyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nicholas Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
    Stanford University · University of Macau · University of California, Berkeley · Yonsei University · Delft University of Technology
  216. JSSC
    2024
    A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time
    DOI
    Haihua Li, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  217. JSSC
    2024
    A 12-GS/s 12-b 4× Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer
    DOI
    Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  218. JSSC
    2024
    A 16-MHz Crystal Oscillator With 17.5- μ s Start-Up Time Under 104-ppm- Δ F Injection Using Automatic Phase-Error Correction
    DOI
    Zixuan Wang, Xin Wang, Ka-Meng Lei, Wenjing Zhang, Yunjin Yin, Tailong Xu, Zhikuang Cai, Yufeng Guo, Pui-In Mak
    Nanjing University of Posts and Telecommunications · University of Macau · Hefei University
  219. JSSC
    2024
    A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO
    DOI
    Haijun Shao, Rui P. Martins, Pui-In Mak
    University of Macau
  220. JSSC
    2024
    A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment
    DOI
    Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui P. Martins, Pui-In Mak
    University of Macau
  221. JSSC
    2024
    A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC–DC Converter With Inherent Current Equalization Characteristics
    DOI
    Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui P. Martins, Pui-In Mak
    University of Macau
  222. JSSC
    2024
    A 256 × 192 -Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging
    DOI
    Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui P. Martins, Chi-Hang Chan, Minglei Zhang
    University of Macau
  223. JSSC
    2024
    A 27 W Wireless Power Transceiver With Compact Single-Stage Regulated Class-E Architecture and Adaptive ZVS Control
    DOI
    Xiaofei Ma, Wing-Hung Ki, Yan Lu
    Hong Kong University of Science and Technology · University of Macau
  224. JSSC
    2024
    A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh
    DOI
    Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui P. Martins, Pui-In Mak
    University of Macau · University of Lisbon · Instituto Superior Técnico
  225. JSSC
    2024
    A 3 THz CMOS Image Sensor
    DOI
    Min Liu, Ziteng Cai, Zhe Wang, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · Zhejiang Lab · University of Macau
  226. JSSC
    2024
    A 93.4% Peak Efficiency C LOAD-Free Multi-Phase Switched-Capacitor DC–DC Converter Achieving a Fast DVS up to 222.5 mV/ns
    DOI
    Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui P. Martins, Man-Kay Law
    University of Macau
  227. JSSC
    2024
    A BW-Extended Fourth-Order Gain-Boosted N-Path Filter Employing a Switched gₘ–C Network
    DOI
    Gengzhen Qi, Haonan Guo, Yunchu Li, Pui-In Mak
    Sun Yat-sen University · University of Macau
  228. JSSC
    2024
    A Battery-Input Three-Mode Buck–Boost Hybrid DC–DC Converter With 97.6% Peak Efficiency
    DOI
    Shuangxing Zhao, Chenchang Zhan, Yan Lu
    University of Macau · Southern University of Science and Technology
  229. JSSC
    2024
    A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction
    DOI
    Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui P. Martins, Pui-In Mak
    University of Macau
  230. JSSC
    2024
    A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator
    DOI
    Xiangyu Mao, Yan Lu, Rui P. Martins
    University of Macau · Chinese Academy of Sciences
  231. JSSC
    2024
    A High-Efficiency Low-Cost Multi-Antenna Energy Harvesting System With Leakage Suppression
    DOI
    Zhaobo Zhang, Chenchang Zhan, Shuangxing Zhao, Man-Kay Law
    University of Macau · Southern University of Science and Technology
  232. JSSC
    2024
    A Single-Stage Bipolar-Output Regulating Rectifier With Negligible Cross-Regulation for Wireless Display
    DOI
    Chenyu Huang, Chenchang Zhan, Xianglong Bai, Yan Lu
    University of Macau · Southern University of Science and Technology
  233. JSSC
    2024
    A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface
    DOI
    Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui P. Martins, Pui-In Mak
    University of Macau
  234. JSSC
    2024
    An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R
    DOI
    Zixuan Xu, Kai Xing, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  235. JSSC
    2024
    An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations
    DOI
    Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui P. Martins, Pui-In Mak
    University of Macau
  236. JSSC
    2024
    FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm 2 Analog Compute-in-Memory Macro
    DOI
    Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui P. Martins, Pui-In Mak
    University of Macau
  237. JSSC
    2024
    Piezoelectric Energy Harvesting Interface Using Self-Bias-Flip Rectifier and Switched-PEH DC–DC for MPPT
    DOI
    Zhen Li, Jing Wang, Man-Kay Law, Sijun Du, Junrui Liang, Xu Cheng, Jun Han, Xiaoyang Zeng, Zhiyuan Chen
    Fudan University · University of Macau · Delft University of Technology · ShanghaiTech University
  238. JSSC
    2024
    Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within − 40°C to 120°C
    DOI
    Chi-Wa U, Man-Kay Law, Rui P. Martins, Chi-Seng Lam
    University of Macau
  239. VLSI
    2024
    A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference Spur
    DOI
    Tianle Chen, Hongyu Ren, Zunsong Yang, Yunbo Huang, Xianghe Meng, Weiwei Yan, Weidong Zhang, Xuqiang Zheng, Xuan Guo, Tetsuya Iizuka, Pui-In Mak, Yong Chen, Bo Li
    Chinese Academy of Sciences · University of Macau · 東京大学The University of Tokyo
  240. VLSI
    2024
    A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm2 On-Chip Bootstrap Driving Density
    DOI
    Xuchu Mu, Yang Jiang, Rui Martins, Pui-In Mak
    University of Macau
  241. A-SSCC
    2023
    2-20-V Wide Input Range Active Rectifier with Single-Multiplexing Adaptive Delay Compensation and Low-Voltage Enhancement for Wireless Power Transmission
    DOI
    Chao Xie, Guangshu Zhao, Junliang Wei, Man-Kay Law, Milin Zhang
    Tsinghua University · University of Macau
  242. A-SSCC
    2023
    A 0.5-to-1.5GHz BW-Extended Gain-Boosted N-Path Filter Using a Switched $\mathbf{g}_{\mathbf{m}}-\mathbf{C}$ Network Achieving 50MHz BW and 18.2dBm OB-IIP3
    DOI
    Gengzhen Qi, Pui-In Mak
    Sun Yat-sen University · University of Macau
  243. A-SSCC
    2023
    A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM
    DOI
    Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Zhaoyu Zhang, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · University of Macau
  244. A-SSCC
    2023
    A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm2 Peak Current Density
    DOI
    Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui P. Martins, Pui-In Mak
    University of Macau
  245. A-SSCC
    2023
    Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm2
    DOI
    Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui In Mak, Rui P. Martins, Man Kay Law
    University of Macau · University of Lisbon
  246. CICC
    2023
    A 12b 1GS/s ADC with Lightweight Input Buffer Distortion Background Calibration Achieving >75dB SFDR over PVT
    DOI
    Xianghui Pan, Buhui Rui, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
    University of Macau · Instituto Superior Técnico
  247. CICC
    2023
    A 13.5-to-28.8GHz 72.3%-Locking Range Multi-Phase Injection-Locked Frequency Tripler with Improved Output Power and Wideband Subharmonic-Spur Rejection in 28nm CMOS
    DOI
    Chao Fan, Ya Zhao, Yanlong, Zhang, Jun Yin, Pui-In Mak, Guohe, Zhang, Li Geng
    Xi'an Jiaotong University · University of Macau
  248. CICC
    2023
    A 5V-to-0.5V Inductor-First Inductor-on-Ground Switched Capacitor Multi-Path Hybrid DC-DC Converter
    DOI
    Junwei Huang, Zhiguo Tong, Yan Lu, Chi-Seng Lam, Rui. P. Martins
    University of Macau
  249. CICC
    2023
    A 72-Channel Resistive-and-Capacitive Sensor Interface Achieving 0.74 μ W/ Channel and 0.038 mm2/ Channel by Noise-Orthogonalizing and Pad-Sharing Techniques
    DOI
    Xiangdong Feng, Yuxuan Luo, Tianyi Cai, Yangfan Xuan, Yunshan Zhang, Yili Shen, Changgui Yang, Qijing Xiao, Yong Chen, Bo Zhao
    Zhejiang University · University of Macau
  250. CICC
    2023
    A Double-Mode Sparse Compute-In-Memory Macro with Reconfigurable Single and Dual Layer Computation
    DOI
    Yuanzhe Zhao, Minglei Zhang, Pengyu He, Zhu Yan, Chi-Hang Chan, R. P. Martins
    University of Macau · University of Lisbon · Instituto Superior Técnico
  251. CICC
    2023
    A Self Bias-flip Piezoelectric Energy Harvester Array without External Energy Reservoirs achieving 488% Improvement with 4-Ratio Switched-PEH DC-DC Converter
    DOI
    Zhen Li, Zhiyuan Chen, Man-Kay Law, Sijun Du, Xu Cheng, Xiaoyang Zeng, Jun Han
    Fudan University · State Key Laboratory of ASIC and System · University of Macau · Delft University of Technology
  252. CICC
    2023
    An ELDC-Free 2.78mW 20MHz-BW 75.5dB-SNDR 4th- Order CTSDM Facilitated by 2nd-Order CT NS-SAR and AC-Coupled Negative-R
    DOI
    ZiXuan Xu, Kai Xing, Yan Zhul, Chi Hang Chan, Rui P. Martins
    University of Macau · University of Lisbon
  253. CICC
    2023
    Weightings in Incremental ADCs: A Tutorial Review
    DOI
    Ruiqi Gao, Mingqiang Guo, Sai-Weng Sin, Liang Qi, Biao Wang, Guoxing Wang, Rui Paulo Martins
    University of Macau · Shanghai Jiao Tong University · University of Lisbon
  254. ESSERC
    2023
    A 0.0035-mm2 0.42-pJ/bit 8–32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE
    DOI
    Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · University of Macau
  255. ESSERC
    2023
    A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM
    DOI
    Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · University of Macau
  256. ESSERC
    2023
    Analog and Mixed-Signal CMOS Circuits: The emergence and leadership of a Lab, a reference Book and the future at the core of the A/D Interface in the IoE
    DOI
    Rui P. Martins
    University of Macau
  257. ISSCC
    2023
    10.2 A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness
    DOI
    Junyan Hao, Minglei Zhang, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, R. P. Martins
    Xidian University · University of Macau · Instituto Superior Técnico
  258. ISSCC
    2023
    10.3 A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer
    DOI
    Yuefeng Cao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, R. P. Martins
    University of Macau · Instituto Superior Técnico
  259. ISSCC
    2023
    10.5 A 25MHz-BW 77.2dB-SNDR 2nd-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-Prediction-Unrolled Scheme
    DOI
    Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, R. P. Martins
    University of Macau · Instituto Superior Técnico
  260. ISSCC
    2023
    10.7 A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping
    DOI
    Yanbo Zhang, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-hang Chan, R. P. Martins
    Xidian University · University of Macau · University of Lisbon · Instituto Superior Técnico
  261. ISSCC
    2023
    11.10 A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC Converter
    DOI
    Wen-Liang Zeng, Guigang Cai, Chon-Fai Lee, Chi-Seng Lam, Yan Lu, Sai-Weng Sin, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  262. ISSCC
    2023
    11.2 A 12V-to-1V Quad-Output Switched-Capacitor Buck Converter with Shared DC Capacitors Achieving 90.4% Peak Efficiency and 48mA/mm3 Power Density at 85% Efficiency
    DOI
    Tingxu Hu, Mo Huang, Yan Lu, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  263. ISSCC
    2023
    11.9 A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck Converter
    DOI
    Guigang Cai, Yan Lu, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  264. ISSCC
    2023
    17.1 A 2x-lnterleaved 9b 2.8G8S/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz Input
    DOI
    Hongzhi Zhao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, R. P. Martins
    University of Macau · Instituto Superior Técnico
  265. ISSCC
    2023
    3.6 A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup Time
    DOI
    Haihua Li, Ka-Meng Lei, Pui-In Mak, Rui P. Martins
    University of Macau · University of Lisbon · Instituto Superior Técnico
  266. ISSCC
    2023
    4.7 A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, −253.8dB Jitter-Power FoM, and −76.1dBc Reference Spur
    DOI
    Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu, Yong Chen, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Macau
  267. ISSCC
    2023
    8.2 A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving −138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz
    DOI
    Xiangxun Zhan, Jun Yin, Pui-In Mak, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  268. ISSCC
    2023
    8.4 An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$
    DOI
    Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  269. ISSCC
    2023
    A 16.4kPixel 3.08-to-3.86THz Digital Real-Time CMOS Image Sensor with 73dB Dynamic Range
    DOI
    Min Liu, Ziteng Cai, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · Tianjin University · University of Macau · Zhejiang University
  270. ISSCC
    2023
    A 42W Reconfigurable Bidirectional Power Delivery Voltage-Regulating Cable
    DOI
    Zhiguo Tong, Junwei Huang, Yan Lu, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  271. ISSCC
    2023
    A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier
    DOI
    Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  272. ISSCC
    2023
    A Continuously Scalable-Conversion-Ratio SC Converter with Reconfigurable VCF Step for High Efficiency over an Extended VCR Range
    DOI
    Yuanfei Wang, Mo Huang, Yan Lu, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  273. ISSCC
    2023
    A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power
    DOI
    Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui P. Martins
    University of Macau · Instituto Superior Técnico
  274. JSSC
    2023
    A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS
    DOI
    Chenghao Zhang, Jiangbo Wei, Yong Chen, Maliang Liu, Yintang Yang
    Xidian University · University of Macau
  275. JSSC
    2023
    A 0.4-V 0.0294-mm 2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K 2 Resolution FoM in 65-nm CMOS
    DOI
    Dan Shi, Ka-Meng Lei, Rui P. Martins, Pui-In Mak
    University of Macau
  276. JSSC
    2023
    A 12-to-1 Flying Capacitor Cross-Connected Buck Converter With Inserted D > 0.5 Control for Fast Transient Response
    DOI
    Tingxu Hu, Mo Huang, Rui P. Martins, Yan Lu
    University of Macau
  277. JSSC
    2023
    A 12-to-1 V Quad-Output Switched-Capacitor Buck Converter With Shared DC Capacitors
    DOI
    Tingxu Hu, Mo Huang, Rui P. Martins, Yan Lu
    University of Macau
  278. JSSC
    2023
    A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier
    DOI
    Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui P. Martins, Chi-Hang Chan
    Fudan University · University of Macau
  279. JSSC
    2023
    A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward
    DOI
    Shulin Zhao, Mingqiang Guo, Liang Qi, Dengke Xu, Guoxing Wang, Rui P. Martins, Sai-Weng Sin
    University of Macau · Shanghai Jiao Tong University
  280. JSSC
    2023
    A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM
    DOI
    Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui P. Martins, Pui-In Mak
    University of Macau
  281. JSSC
    2023
    A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC
    DOI
    Hongzhi Zhao, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  282. JSSC
    2023
    A 6.78-MHz Wireless Power Transfer System With Inherent Wireless Phase Shift Control Without Feedback Data Sensing Coil
    DOI
    Xianglong Bai, Yan Lu, Chenchang Zhan, Rui P. Martins
    University of Macau · Southern University of Science and Technology
  283. JSSC
    2023
    A 95% Peak Efficiency Modified KY Converter With Improved Flying Capacitor Charging in DCM for IoT Applications
    DOI
    Caolei Pan, Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui P. Martins
    University of Macau · Southern University of Science and Technology
  284. JSSC
    2023
    A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3 Field of View
    DOI
    Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui P. Martins
    University of Macau
  285. JSSC
    2023
    A Portable CMOS-Based Spin Resonance System for High-Resolution Spectroscopy and Imaging
    DOI
    Daniel Krüger, Aoyang Zhang, Behdad Aghelnejad, Henry Hinton, Victor Marrugat Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham
    University of Stuttgart · Harvard University · Oxford Instruments (United Kingdom) · ETH Zurich · Meta · University of Macau
  286. JSSC
    2023
    A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator
    DOI
    Hongshuai Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
    University of Macau
  287. JSSC
    2023
    All Rivers Flow to the Sea: A High-Density Wireless Power Receiver With Split-Dual-Path and Hybrid-Quad-Path Step-Down Rectifying Conversion
    DOI
    Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui P. Martins
    University of Macau
  288. JSSC
    2023
    An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current
    DOI
    Guigang Cai, Yan Lu, Rui P. Martins
    University of Macau · Chinese Academy of Sciences
  289. JSSC
    2023
    Fully Integrated Frequency-Tuning Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting
    DOI
    Chao Xie, Guangshu Zhao, Yuan Ma, Man-Kay Law, Milin Zhang
    Tsinghua University · University of Macau · Beijing National Research Center for Information Science and Technology
  290. VLSI
    2023
    A 0.05-to-3.1A 585mA/mm3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free Operation
    DOI
    Xiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Martins
    University of Macau · University of Lisbon
  291. VLSI
    2023
    A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
    DOI
    MoonHyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E.J. Chichilnisky, Boris Murmann, Dante G. Muratore
    Stanford University · University of Macau · Yonsei University · Delft University of Technology
  292. VLSI
    2023
    A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOS
    DOI
    Zhao Zhang, Zhaoyu Zhang, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · University of Macau
  293. VLSI
    2023
    A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors
    DOI
    Minglei Zhang, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, R. P. Martins
    University of Macau
  294. A-SSCC
    2022
    A 0.3V 762nW-Only Binary-Search Phase ADC With Current-Reused RO-based Comparator
    DOI
    Sifan Wang, Kejin Li, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
    University of Macau · University of Lisbon
  295. A-SSCC
    2022
    A 140GHz 4TX-4RX Phased-Array FMCW-FSK Antenna-Packaged Radar Chipset With 25dBm EIRP and 16GHz BW
    DOI
    Shunli Ma, Tianxiang Wu, Zhuofan Xu, Zhonghao Sun, Xuefeng Li, Lei Wu, Biao Hu, Junyan Ren, Yong Chen, Jiebin Pan
    Fudan University · University of Macau · Anhui East China Institute of Optoelectronic Technology (China)
  296. A-SSCC
    2022
    A 2m-Range 711uW Body Channel Communication Transceiver Featuring Dynamically-Sampling Bias-Free Interface Front End
    DOI
    Guanjie Gu, Changgui Yang, Zhuhao Li, Xiangdong Feng, Ziyi Chang, Ting-Hsun Wang, Yunshan Zhang, Yuxuan Luo, Hong Zhang, Ping Wang, Sijun Du, Yong Chen, Bo Zhao
    Zhejiang University · Delft University of Technology · University of Macau
  297. A-SSCC
    2022
    A 3.07mW 30MHz-BW 73.5dB-SNDR Time-Interleaved Noise-Shaping SAR ADC with 2nd-order Error-Feedforward and Redundancy-Bit Reduction
    DOI
    Shulin Zhao, Mingqiang Guo, Sai-Weng Sin, Liang Qi, Dengke Xu, Guoxing Wang, Rui P. Martins
    University of Macau · Shanghai Jiao Tong University · University of Lisbon
  298. A-SSCC
    2022
    A Single-Channel 14b 500 MS/s Pipelined-SAR ADC with Reference Ripple Mitigation Techniques and Adaptive-Biased Floating Inverter Amplifier
    DOI
    Wenning Jiang, Yan Zhu, Chi-Hang Chan, Rui Martins
    University of Macau · Fudan University
  299. A-SSCC
    2022
    A sub-0.5V Crystal Oscillator-Timer (XO-Timer) Combining 16MHz Reference and 32kHz Sleep Timer with a Single Crystal for Energy-Harvesting Radios in 28nm CMOS
    DOI
    Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui P.Martins
    University of Macau
  300. CICC
    2022
    A 10b 700MS/s single-channel 1b/cycle SAR ADC using a monotonic-specific feedback SAR logic with power-delay-optimized unbalanced N/P-MOS sizing
    DOI
    Mingqiang Guo, Sai-Weng Sin, Liang Qi, Gangjun Xiao, Rui P. Martins
    University of Macau · Shanghai Jiao Tong University · University of Lisbon
  301. CICC
    2022
    A Battery-Less Crystal-Less 49.8µW Neural-Recording Chip Featuring Two-Tone RF Power Harvesting
    DOI
    Ziyi Chang, Changgui Yang, Yunshan Zhang, Zhuhao Li, Tianyu Zheng, Yuxuan Luo, Shaomin Zhang, Kedi Xu, Yong Chen, Gang Pan, Bo Zhao
    Zhejiang University · University of Macau
  302. CICC
    2022
    All Rivers Flow to the Sea: A High Power Density Wireless Power Receiver with Split-Dual-Path Rectification and Hybrid-Quad-Path Step-Down Conversion
    DOI
    Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui P. Martins
    University of Macau
  303. ESSERC
    2022
    A 0.01mm2, 0.4V-VDD, 4.5nW-Power DC-Coupled Digital Acquisition Front-End Based on Time-Multiplexed Digital Differential Amplification
    DOI
    Paolo Crovetti, Roberto Rubino, Pedro Toledo, Francesco Musolino, Hamilton Klimach, Yong Chen, Anna Richelli
    Politecnico di Torino · Universidade Federal do Rio Grande do Sul · University of Macau · University of Brescia
  304. ESSERC
    2022
    A 112-Gb/s Single-Ended PAM-4 Transceiver Front-End for Reach Extension in Long-Reach Link
    DOI
    Xiongshi Luo, Xuewei You, Jiahan Fu, Zhenghao Li, Liping Zhong, Taiyang Fan, Zhang Qiu, Wenbo Xiao, Yong Chen, Quan Pan
    Southern University of Science and Technology · University of Macau
  305. ESSERC
    2022
    A Portable CMOS-based MRI System with 67×67×83 µm3Image Resolution
    DOI
    Daniel Kruger, Aoyang Zhang, Henry Hinton, Victor M. Arnal, Yi-Qiao Song, Yiqiao Tang, Ka-Meng Lei, Jens Anders, Donhee Ham
    University of Stuttgart · Harvard University · Meta · University of Macau
  306. ISSCC
    2022
    A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS
    DOI
    Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins
    University of Macau · University of Lisbon
  307. ISSCC
    2022
    A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and −3dBm OOB-B−1dB
    DOI
    Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui P. Martins
    University of Macau · Sun Yat-sen University · University of Lisbon
  308. ISSCC
    2022
    A 27W D2D Wireless Power Transfer System with Compact Single-Stage Regulated Class-E Architecture and Adaptive ZVS Control
    DOI
    Xiaofei Ma, Yan Lu, Wing-Hung Ki
    Hong Kong University of Science and Technology · University of Macau
  309. ISSCC
    2022
    A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD
    DOI
    Tingxu Hu, Mo Huang, Yan Lu, Rui P. Martins
    University of Macau · University of Lisbon
  310. ISSCC
    2022
    A BJT-Based CMOS Temperature Sensor Achieving an Inaccuracy of $\pm 0.45{{}^{\circ}\mathsf{C}}(3\sigma)$ from -50°C to 180°C and a Resolution-FoM of 7.2pJ.K2 at 150°C
    DOI
    Bo Wang, Man-Kay Law, Amine Bermak
    Hamad bin Khalifa University · University of Macau
  311. ISSCC
    2022
    A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm2 Current Density Hybrid SC-Parallel-Inductor Buck Converter with Reduced Inductor Current in 65nm CMOS
    DOI
    Guigang Cai, Yan Lu, Rui Martins
    University of Macau · University of Lisbon
  312. JSSC
    2022
    A 0.0285-mm2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS
    DOI
    Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui P. Martins
    University of Macau · University of Lisbon · Instituto Superior Técnico
  313. JSSC
    2022
    A 1.7–3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4–4.8 dB NF
    DOI
    Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui P. Martins
    University of Macau · Sun Yat-sen University · University of Lisbon · Instituto Superior Técnico
  314. JSSC
    2022
    A 108-nW 0.8-mm2 Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS
    DOI
    Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins
    University of Macau
  315. JSSC
    2022
    A 13-Bit ENOB Third-Order Noise-Shaping SAR ADC Employing Hybrid Error Control Structure and LMS-Based Foreground Digital Calibration
    DOI
    Qihui Zhang, Ning Ning, Zhong Zhang, Jing Li, Kejun Wu, Yong Chen, Qi Yu
    University of Electronic Science and Technology of China · State Key Laboratory of Electronic Thin Films and Integrated Devices · University of Macau
  316. JSSC
    2022
    A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations
    DOI
    Yanbo Zhang, Jin Zhang, Shubin Liu, Ruixue Ding, Yan Zhu, Chi-Hang Chan, Rui P. Martins
    Xidian University · University of Macau · University of Lisbon · Instituto Superior Técnico
  317. JSSC
    2022
    A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and −3-dBm OOB-B−1 dB
    DOI
    Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui P. Martins
    University of Macau · Sun Yat-sen University
  318. JSSC
    2022
    A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier
    DOI
    Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui P. Martins
    University of Macau · IMEC
  319. JSSC
    2022
    A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR
    DOI
    Qiwen Liao, Yuguang Zhang, Siyuan Ma, Lei Wang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi
    Chinese Academy of Sciences · University of Chinese Academy of Sciences · Peng Cheng Laboratory · University of Macau
  320. JSSC
    2022
    A Reconfigurable Single-Stage Asymmetrical Full-Wave Step-Down Rectifier for Bidirectional Device-to-Device Wireless Fast Charging
    DOI
    Fangyu Mao, Yan Lu, Rui P. Martins
    University of Macau · Chinese Academy of Sciences
  321. JSSC
    2022
    A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors
    DOI
    Xiangyu Mao, Yan Lu, Rui P. Martins
    University of Macau
  322. JSSC
    2022
    A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS
    DOI
    Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui P. Martins
    University of Macau · University of Pavia
  323. JSSC
    2022
    An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration
    DOI
    Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui P. Martins
    University of Macau
  324. JSSC
    2022
    Arithmetic Progression Switched-Capacitor DC–DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery
    DOI
    Yang Jiang, Man-Kay Law, Pui-In Mak, Rui P. Martins
    University of Macau
  325. JSSC
    2022
    Subranging BJT-Based CMOS Temperature Sensor With a ±0.45 °C Inaccuracy (3σ) From −50 °C to 180 °C and a Resolution-FoM of 7.2 pJ·K² at 150 °C
    DOI
    Bo Wang, Man-Kay Law
    Hamad bin Khalifa University · University of Macau