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大学University · 韓国Korea · 2022–2026 LIVE

Yonsei University

韓国Korea 3位 (57.5 pt) · 世界World 12位 (10 pt) · 対象論文Papers 95

年別の推移Papers per year

会議・論文誌別の論文数（フルカウント）Papers per venue (full count)

0102030402022 ISSCC: 22022 VLSI: 32022 JSSC: 72022 A-SSCC: 22022 ESSERC: 21620222023 ISSCC: 12023 VLSI: 52023 JSSC: 72023 CICC: 12023 A-SSCC: 41820232024 ISSCC: 12024 VLSI: 32024 JSSC: 42024 A-SSCC: 22024 ESSERC: 31320242025 ISSCC: 12025 VLSI: 32025 JSSC: 72025 CICC: 12025 A-SSCC: 32025 ESSERC: 21720252026 ISSCC: 22026 VLSI: 82026 JSSC: 202026 CICC: 1312026
ISSCCVLSIJSSCCICCA-SSCCESSERC
数値表を表示Show table
会議・論文誌Venue20222023202420252026
ISSCC21112
VLSI35338
JSSC774720
CICC–1–11
A-SSCC2423–
ESSERC2–32–

会議・論文誌別By venue

順位はフルカウントでの値です。Ranks use the full count.

会議・論文誌VenueフルFull 筆頭First按分Frac. 順位Rank
ISSCC Tier 1765.16韓国Korea #8 · 世界World #40
VLSI Tier 1221713.33韓国Korea #2 · 世界World #6
JSSC Tier 1453427.04韓国Korea #2 · 世界World #9
CICC Tier 2332.80韓国Korea #6 · 世界World #65
A-SSCC Tier 211107.85韓国Korea #4 · 世界World #15
ESSERC Tier 2764.39韓国Korea #3 · 世界World #19

対象論文Papers

太字はこの機関の所属として確認できた著者です。Bold: authors affiliated with this institution.

  1. CICC
    2026
    An 85.1dB-SNDR 1MHz-BW Noise-Shaping SAR ADC with kT/C Noise-Shaping and 96fF Sampling Capacitor
    DOI
    Byeongjin Son, Jongyoon Won, Kyungmin Kang, Yong Lim, Youngcheol Chae
    Yonsei University
  2. ISSCC
    2026
    2.3 A 71.3mJ/Frame End-to-End Driving Processor with Flexible Heterogeneous Core Orchestration via Sparsity Reasoning
    DOI
    Jueun Jung, Sangho Lee, Junghyun Yoo, Ghangmin Yun, Kyuho Jason Lee
    Ulsan National Institute of Science and Technology · Yonsei University
  3. ISSCC
    2026
    37.9 A 14Gb/s/pin 0.163pJ/b DQ Receiver for HBM with Baud-Rate Phase Tracking Loop Supporting Background Offset Calibration
    DOI
    Jeonghyeon Lee, Ho-Joon Shin, Han-Gon Ko, Kwanseo Park
    Yonsei University
  4. JSSC
    2026
    25-Gb/s 850-nm Monolithic Optical Receiver With a Si APD Bias Controller Using Histogram Monitoring
    DOI
    Jae-Ho Lee, Seung-Jae Yang, Myung-Jae Lee, Woo-Young Choi
    Yonsei University
  5. JSSC
    2026
    A 1.19-pJ/b 32-Gb/s Baud-Rate Receiver Employing 2UI Integrated Pattern-Based CDR and DFE Adaptation Without Data-Level Reference
    DOI
    Suil Kang, Sinho Lee, Young-Wook Kim, Junhak Kim, Ho-Joon Shin, Haram Ju, Kwangho Lee, Kwanseo Park
    Yonsei University · Korea Electronics Technology Institute
  6. JSSC
    2026
    A 14 nm SRAM Using NMOS Header Assist Cell for Improved Write Ability and Reduced Cell Retention Leakage With Minimal Power Overhead
    DOI
    Jungmyung Kang, Keonhee Cho, Sekeon Kim, Giseok Kim, Hyunjun Kim, Dongwook Seo, Sangyeop Baeck, Sei Seung Yoon, Seong-Ook Jung
    Samsung · Yonsei University
  7. JSSC
    2026
    A 14-Gb/s/pin Single-Ended HBM DQ Receiver With Baud-Rate Phase Tracking and Background Detector-Offset Cancellation
    DOI
    Jeonghyeon Lee, Ho-Joon Shin, Han-Gon Ko, Kwanseo Park
    Yonsei University
  8. JSSC
    2026
    A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition
    DOI
    Kyeongwon Jeong, Can Livanelioglu, Jiawei Liao, Inhee Lee, Taekwang Jang
    Yonsei University · ETH Zurich · University of Pittsburgh
  9. JSSC
    2026
    A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing
    DOI
    Do-Yoon Lim, Sehee Lim, Donghan Ko, In-Jun Jung, Giseok Kim, Do Han Kim, Donggyun Ha, Sunjong Park, Hohyun Chae, Seungjae Yei, Taehui Na, Seong-Ook Jung
    Yonsei University · Incheon National University
  10. JSSC
    2026
    A 40-nm 26.4 mW, 18.6 MS/s Image Reconstruction Processor for IoT Compressive Sensing
    DOI
    Yu-Cheng Lin, Chanmin Park, Wenda Zhao, Nan Sun, Youngcheol Chae, Chia-Hsiang Yang
    National Taiwan University · Yonsei University · The University of Texas at Austin · Tsinghua University
  11. JSSC
    2026
    A 60–110-GHz Compact Switchless Bidirectional Amplifier Based on Transformer Feedback
    DOI
    Kyu-Jong Choi, Byung-Wook Min
    Yonsei University
  12. JSSC
    2026
    A Broadband 1–7-GHz Switched Delay Line Circulator Based on a Neutralized Switch in 28-nm FD-SOI CMOS
    DOI
    Jun Hwang, Byung-Wook Min
    Yonsei University
  13. JSSC
    2026
    A Continuous-Time Zoom ADC With Coarse Noise-Shaping ADC and Interstage Low-Pass Filter
    DOI
    Junghyun Yoon, Youngcheol Chae
    Yonsei University
  14. JSSC
    2026
    A Flying Push-Pull Current Neurostimulator With Body-Coupled Powering and Full-Duplex Communication for Multi-Site Stimulation
    DOI
    Kyungmin Kang, Taejune Jeon, Sanghoon Lee, Seokho Yoon, Byeongjin Son, Soohyun Yun, Byeongseol Kim, Samhwan Kim, Hyerin Jeong, Sangwon Lee, Jaeyeon Choi, Kyuil Lee, Sunggu Yang, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University
  15. JSSC
    2026
    A High-Density Low-Leakage and Low-Power Fully Voltage-Stacked SRAM for IoT Application
    DOI
    Sekeon Kim, Giseok Kim, Kyeongrim Baek, Keonhee Cho, Hyunjun Kim, Yeonho Jung, Dongwook Seo, Sangyeop Baeck, Sungjae Lee, Seong-Ook Jung
    Yonsei University · Samsung
  16. JSSC
    2026
    A SPAD Flash LiDAR Sensor With Push-Pull Analog Counter Achieving a 0.12% Depth Precision at a 70 m Depth Range
    DOI
    Dongseok Cho, Byungchoul Park, Hyun-Seung Choi, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Myongji University
  17. JSSC
    2026
    A W-Band Active Bidirectional Phase Shifter With 2° RMS Phase Error Over 26.4% FBW Using Back-Gate Biasing in 28-nm FD-SOI CMOS
    DOI
    Sungwon Kwon, Byung-Wook Min
    Yonsei University
  18. JSSC
    2026
    An Energy-Efficient Real-Time Multi-Modal End-to-End Driving Processor With Sparsity-Adaptive Heterogeneous Core Orchestration
    DOI
    Jueun Jung, Sangho Lee, Junghyun Yoo, Ghangmin Yun, Minsoo Seo, Jeongho Nam, Kyuho Jason Lee
    Yonsei University · Electronics and Telecommunications Research Institute
  19. JSSC
    2026
    DPIM: A 2T1C eDRAM Transformer-in-Memory Chip With Sparsity-Aware Quantization and Heterogeneous Dense–Sparse Core
    DOI
    Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Sejeong Yang, Hoichang Jeong, Keonhee Park, Ki-Soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin Kim, Jaemin Kim, Kyuho Jason Lee, Joo-Hyung Chae, Kunhee Cho, Joo-Young Kim
    Korea Advanced Institute of Science and Technology · Kyungpook National University · Ulsan National Institute of Science and Technology · Kwangwoon University · Yonsei University · Sungkyunkwan University
  20. JSSC
    2026
    DPe-CIM: A 4T-1C Dual-Port eDRAM-Based Compute-in-Memory for Simultaneous Computing and Refresh With Adaptive Refresh and Data Conversion Reduction Scheme
    DOI
    Do Han Kim, Minyoung Jo, Gi Seok Kim, Dong Gyun Ha, Ung Bin Oh, Donghan Ko, Jiwoo Lee, Mingu Kang, Seong-Ook Jung
    Yonsei University · University of California San Diego
  21. JSSC
    2026
    Dual-Mode Inverter-Based Write Termination Scheme for Energy- and Area-Efficient Write Operation in 28-nm 1T1MTJ STT-MRAM
    DOI
    Do-Yoon Lim, Donghan Ko, Sekeon Kim, Sunjong Park, Wangyu Lee, Taegeon Min, Jihoo Moon, Seong-Ook Jung
    Yonsei University
  22. JSSC
    2026
    SERAH-CIM: Sparsity-Aware Effective Row Activation Analog-Digital Hybrid eDRAM CIM With In-Macro Multi-Row-Multi-Task Control
    DOI
    Hoichang Jeong, Seungbin Kim, Dongwook Kim, Jueun Jung, Kyuho Jason Lee
    Yonsei University · Ulsan National Institute of Science and Technology
  23. JSSC
    2026
    Self-Enabled Write Assist Cells for High-Density SRAM in Resistance-Dominated Technology Node
    DOI
    Minjune Yeo, Seungjae Yei, Keonhee Cho, Giseok Kim, Mingu Kang, Seong-Ook Jung
    Yonsei University · University of California San Diego
  24. VLSI
    2026
    A 16-Channel Neural Recording IC with Spike-Driven Adaptive-Basis Compressive Sensing
    DOI
    Sanghoon Lee, Soohyun Yun, Seokho Yoon, Kyungmin Kang, Taejune Jeon, Sang Hoon Park, Ju Young Lee, Won Gi Chung, Jang-Ung Park, Ki Jun Yu, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University
  25. VLSI
    2026
    A 16.8-33.6 Gb/s, 0.93pJ/b Direct-Frequency-Tracking Digital CDR with an SSC Profile Replicator for Per-Lane Data-Rate Variation and High Jitter Tolerance Under Deep SSC
    DOI
    Jongwha Kim, Yongwoo Jo, Seongyun Min, Juntak Chun, Yuhwan Shin, Hyunjun Song, Seohyeon Kwak, Kwanseo Park, Jaehyouk Choi
    Seoul National University · Samsung · Yonsei University
  26. VLSI
    2026
    A 1MHz-BW 90.1dB-SNDR CT Zoom ADC with Mismatch Error Shaping Preserving Full-Scale Input Range
    DOI
    Junghyun Yoon, Zhaonan Lu, Yong Lim, Zhichao Tan, Youngcheol Chae
    Yonsei University · Zhejiang University
  27. VLSI
    2026
    A 256-Channel, 32-Interconnect, 1.25-NEF, in Vitro and In Vivo Neural Interface With Auto-Calibrated Input Impedance Boosting and on-Chip Spike Detection for Flexible Capacitive Microelectrode Array
    DOI
    Yiyang Chen, Suhyeon Nam, Sun-woong Byun, Pietro Velcich, Shinil Cho, Chanwoo Lee, Ju Young Lee, Sean Weaver, Enrico Brugnolotto, Eunkyu Hwang, Dongseok Seo, Eunee Lee, Ki Jun Yu, Woojun Choi, Taekwang Jang
    ETH Zurich · Yonsei University · Institut Català de Nanociència i Nanotecnologia
  28. VLSI
    2026
    A 3.25-Gb/S 0.74-pJ/bit IR-UWB Transmitter Using Edge-Reference Differential Phase Shift Keying (ER-DPSK)
    DOI
    Donggun Lee, Kyoungseok Song, Sangho Rhee, Tae Wook Kim
    Yonsei University
  29. VLSI
    2026
    A SPAD-Based iToF Flash LiDAR Sensor with a Coarse-Fine Operation Scheme Robust Against Strong Background Light
    DOI
    Dongseok Cho, Hyun-Seung Choi, Injun Park, Yoondeok Na, Seonghun Yang, Minkyoung Yang, Yerin Youn, Jimin Cheon, Myung-Jae Lee, Youngcheol Chae
    Yonsei University
  30. VLSI
    2026
    Back-Illuminated CMOS-SPAD with Full-Surround Anode Structure Achieving Sub-50 ps Timing Jitter for High-Precision Physical-AI Sensors
    DOI
    Joo-Hyun Kim, Doyoon Eom, Hyun-Seung Choi, Eunsung Park, Woo-Young Choi, Myung-Jae Lee
    Yonsei University
  31. VLSI
    2026
    HCNP: A 70.2 TOPS/W Hybrid CIM-NPU Processor with In-Streaming Processing for Energy-Efficient CNN/Transformer Acceleration in HMD
    DOI
    Seungbin Kim, Hoichang Jeong, Dongwook Kim, Jiwon Kim, Kyuho Jason Lee
    Ulsan National Institute of Science and Technology · Yonsei University
  32. A-SSCC
    2025
    A 28-Gb/s Receiver with Baud-Rate CDR Employing Integrated Pattern-Based Phase Detector Achieving ISI Invariant Phase Locking
    DOI
    Yoojin Jung, Ho-Joon Shin, Junhak Kim, Sinho Lee, Jun-Soo Park, Kwanseo Park
    Yonsei University
  33. A-SSCC
    2025
    Multi-band LPWAN Transceiver with Two-step Wake-up Receiver and Switched Capacitor PA Based Transmitter Achieving -125 dBm sensitivity, 6.7 uW at 1 s wake-up latency, and 1 Mbps BFSK modulation
    DOI
    Thinh Tran-Dinh, Hafiz Usman Mahmood, Jinglong Xu, Keun-Mok Kim, Kyung-Sik Choi, Jaeheon Lee, Jinho Ko, Sang-Gug Lee, Jusung Kim
    Korea Advanced Institute of Science and Technology · ETH Zurich · Qualcomm · Yonsei University · Ewha Womans University
  34. A-SSCC
    2025
    Wideband linearity enhancement technique using Source Follower (SF) feedforward distortion cancellation with GaN technology
    DOI
    Jungyeon Jo, Deokyoung Kim, Sanghun Lee, Tae Wook Kim
    Yonsei University · Samsung
  35. CICC
    2025
    A Resistive Dynamic Bias Comparator with Flying Capacitors Achieving 129µVrms Input-Referred Noise at 1GS/s in 28nm FD-SOI
    DOI
    Byeongjin Son, Heungsik Eum, Hyeonjun Pi, Youngcheol Chae
    Yonsei University
  36. ESSERC
    2025
    A 111-μW 100.8-dB DR Audio Continuous-Time Delta-Sigma Modulator Using Positive Feedback Amplifier
    DOI
    Suyoung Chon, Junghyun Yoon, Moonhyung Jang, Yong Lim, Youngcheol Chae
    Yonsei University · National University of Singapore
  37. ESSERC
    2025
    A 30.7 TOPS/W Sparsity-Aware Analog-Digital Hybrid eDRAM CIM by Effective Row Activation with Simultaneous Multi-Row-Multi-Task Control
    DOI
    Hoichang Jeong, Seungbin Kim, Jueun Jung, Kyuho Jason Lee
    Ulsan National Institute of Science and Technology · Yonsei University
  38. ISSCC
    2025
    SPAD Flash LiDAR with Chopped Analog Counter for 76m Range and 120klx Background Light
    DOI
    Hyun-Seung Choi, Injun Park, Byungchoul Park, Dongseok Cho, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Myongji University
  39. JSSC
    2025
    A 14-to-32-Gb/s Deadzone-Free Referenceless CDR With Autocovariance-Based Seamless Frequency Detector in 40-nm CMOS Technology
    DOI
    Hong-Seok Choi, Jae-Geon Lee, Seung-Hwan Gong, Kwang-Ho Lee, Daehyun Koh, Jung-Woo Sull, Hyungrok Do, Chan-Ho Kye, Deog-Kyoon Jeong, Kwanseo Park, Min-Seong Choo
    SK hynix · Hanyang University · Korea Electronics Technology Institute · Samsung · Gachon University · Seoul National University · Yonsei University
  40. JSSC
    2025
    A LiDAR–PNN Pipelined Processor With Cylindrical Bin Partitioning and Halo Indexing for 3-D Perception in Outdoor Autonomous Driving Applications
    DOI
    Bokyoung Seo, Jueun Jung, Donghyeon Han, Kyuho Jason Lee
    Ulsan National Institute of Science and Technology · Chung-Ang University · Yonsei University
  41. JSSC
    2025
    A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface
    DOI
    Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung Mo Moon, Kyomin Sohn, Seong-OoK Jung
    Yonsei University · Samsung
  42. JSSC
    2025
    An 80-Gb/s/pin Single-Ended Voltage-Mode PAM-4 Transmitter With a Pulsewidth Pre-Emphasis and a 4-Tap FFE in 28-nm CMOS
    DOI
    Jae-Koo Park, Dae-Won Rho, Seung-Jae Yang, Woo-Young Choi
    Yonsei University
  43. JSSC
    2025
    An Intrinsically Linear Multi-Rate Continuous-Time Zoom ADC Achieving 97.4-dB DR and 105.7-dB SFDR in 50-kHz Signal Bandwidth
    DOI
    Junghyun Yoon, MoonHyung Jang, Changuk Lee, Yong Lim, Youngcheol Chae
    Yonsei University · Stanford University · University of California, Berkeley · Samsung
  44. JSSC
    2025
    Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing
    DOI
    Sehee Lim, In Jun Jung, Gi Seok Kim, Dong Han Ko, Sumin Lee, Seong-Ook Jung
    Yonsei University
  45. JSSC
    2025
    NeRF-Navi: An Energy-Efficient NeRF 3-D Path Planning Processor With Reconfigurable Approximate/Accurate Bit Offloading Core
    DOI
    Seryeong Kim, Seokchan Song, Wonhoon Park, Junha Ryu, Gwangtae Park, Sangyeob Kim, Soyeon Kim, Donghyeon Han, Hoi-Jun Yoo
    Korea Advanced Institute of Science and Technology · Yonsei University · Chung-Ang University
  46. VLSI
    2025
    A 10kHz-BW, 86.7dB-SNDR, 176.8dB-FoM, LNA-Embedded CT $\mathbf{\Delta}\mathbf{\Sigma}$ ADC for Closed-Loop Neural Recording
    DOI
    Sanghoon Lee, Junghyun Yoon, Taejune Jeon, Danbi Ahn, Soohyun Yun, Hee Young Kim, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University
  47. VLSI
    2025
    A 91.2dB-SNDR 250kHz-BW CT Zoom ADC Achieving a 6-Bit Linear Zoom-in with Interstage LPF and 1.5-Bit DAC
    DOI
    Junghyun Yoon, Youngcheol Chae
    Yonsei University
  48. VLSI
    2025
    A Fully Balanced Biphasic Neurostimulator with Body-Coupled Powering and Full-Duplex Communication Via Baseband Load Shift Keying
    DOI
    Taejune Jeon, Kyungmin Kang, Soohyun Yun, Seokho Yoon, Byeongseol Kim, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University
  49. A-SSCC
    2024
    A 16-30Gb/s 1.03pJ/b Referenceless Baud-Rate CDR with Integrated Pattern Decoding Technique for Fast Frequency Acquisition
    DOI
    Yoojin Jung, Young-Wook Kim, Sinho Lee, Suil Kang, Kwanseo Park
    Yonsei University
  50. A-SSCC
    2024
    DPe-CIM: A 4T1C Dual-Port eDRAM Compute-in-Memory for Simultaneous Computing and Refresh with Adaptive Refresh and Data Conversion Reduction Scheme
    DOI
    Dohan Kim, Minyoung Jo, Gi-Seok Kim, Dong-Gyun Ha, Ung-Bin Oh, Seong-Ook Jung
    Yonsei University
  51. ESSERC
    2024
    A 0.07-pJ/bdB 32-Gb/s Receiver with Pattern-Based Baud-Rate CDR and DFE Adaptation Using 2UI Integrator without Data-Level Reference
    DOI
    Suil Kang, Young-Wook Kim, Sinho Lee, Junhak Kim, Haram Ju, Kwangho Lee, Sunggon Shin, Kwanseo Park
    Yonsei University · Korea Electronics Technology Institute
  52. ESSERC
    2024
    A 13b 40MS/s SAR ADC with Robust kT/C Noise Cancellation using a Feedback Auxiliary Amplifier
    DOI
    Jongyoon Won, Byeongjin Son, Yigi Kwon, Junghyun Yoon, Youngcheol Chae
    Yonsei University
  53. ESSERC
    2024
    A 14nm SRAM Using NMOS Header Assist Cell for Improved Write Ability and Reduced Cell Retention Leakage
    DOI
    Jungmyung Kang, Keonhee Cho, Sekeon Kim, Giseok Kim, Hyunjun Kim, Dongwook Seo, Sangyeop Baeck, Seiseung Yoon, Seong-Ook Jung
    Yonsei University · Samsung
  54. ISSCC
    2024
    15.4 Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology Node
    DOI
    Minjune Yeo, Keonhee Cho, Giseok Kim, Won Joon Jo, Jisang Oh, Sekeon Kim, Kyeongrim Baek, Sungho Park, Seung Jae Yei, Seong-Ook Jung
    Yonsei University
  55. JSSC
    2024
    A 1024-Channel 268-nW/Pixel 36×36 μm 2 /Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain–Computer Interfaces
    DOI
    Moonhyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nicholas Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
    Stanford University · University of Macau · University of California, Berkeley · Yonsei University · Delft University of Technology
  56. JSSC
    2024
    A Highly Digital 143.2-dB DR Sub-1° Phase Error Impedance Monitoring IC With Pulsewidth Modulation Frontend
    DOI
    Hyeonho Han, Byungchoul Park, Jaesuk Sung, Heon-Jin Choi, Youngcheol Chae
    Yonsei University
  57. JSSC
    2024
    A Single-Ended Inverter-Based Addition-Only Feed-Forward Equalization Transmitter
    DOI
    Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang, Byungsub Kim
    Pohang University of Science and Technology · Samsung · Yonsei University
  58. JSSC
    2024
    Compact mm-Wave Ultra-Wideband and Low-Noise Phase Alternately Distributed Quasi-Circulators
    DOI
    Jun Hwang, Dongho Yoo, Byung-Wook Min
    Yonsei University
  59. VLSI
    2024
    A 30fps $\mathbf{64}\times \mathbf{64}$ CMOS Flash LiDAR Sensor with Push-Pull Analog Counter Achieving 0.1% Depth Uncertainty at 70m Detection Range
    DOI
    Dongseok Cho, Byungchoul Park, Hyun-Seung Choi, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Korea Institute of Science and Technology
  60. VLSI
    2024
    A 7.2inch 5.5Mpixel 600mW SPAD X-Ray Detector with 116.7 dB Dynamic Range
    DOI
    Byungchoul Park, Hyun-Seung Choi, Jinwoong Jeong, Jimin Cheon, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Korea Institute of Science and Technology · Kumoh National Institute of Technology
  61. VLSI
    2024
    A Wireless Neurostimulator Using Body-Coupled Link for Multisite Stimulation in Freely Behaving Animals
    DOI
    Taejune Jeon, Byeongseol Kim, Changuk Lee, Danbi Ahn, Daerl Park, Jaesuk Sung, Hee Young Kim, Heon-Jin Choi, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University · University of California, Berkeley · Daegu Haany University
  62. A-SSCC
    2023
    A 23.9 µW 13.6-bit Period Modulation-Based Capacitance-to-Digital Converter with Dynamic Current Mirror Front-end Achieving Capacitor Range of 1 to 68 pF
    DOI
    Hyeyeon Lee, Donguk Seo, Young-Jin Woo, Yoonmyung Lee, Inhee Lee, Youngcheol Chae
    Yonsei University · Sungkyunkwan University · University of Pittsburgh
  63. A-SSCC
    2023
    A 80Gb/s/pin Single-Ended PAM-4 Transmitter With an Edge Boosting Auxiliary Driver and a 4-Tap FFE in 28-nm CMOS
    DOI
    Dae-Won Rho, Jae-Koo Park, Seung-Jae Yang, Woo-Young Choi
    Yonsei University · Samsung
  64. A-SSCC
    2023
    An 11bit 360MS/s Pipelined SAR ADC with Dynamic Negative-C Assisted Residue Amplifier
    DOI
    Yigi Kwon, Sangwoo Lee, Changuk Lee, Hyunchul Yoon, Byounghan Min, Youngcheol Chae
    Yonsei University · LG
  65. A-SSCC
    2023
    An 8.5ps Resolution, $2000\mu\mathrm{m}^{2}$ Phase-Domain Delta-Sigma TDC for Lidar Applications
    DOI
    Yoondeok Na, Seokho Yun, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Korean Association Of Science and Technology Studies · Korea Institute of Science and Technology
  66. CICC
    2023
    A 243μW 97.4dB-DR 50kHz-BW Multi-Rate CT Zoom ADC with Inherent DAC Mismatch Tolerance
    DOI
    Junghyun Yoon, MoonHyung Jang, Changuk Lee, Yong Lim, Youngcheol Chae
    Yonsei University · Samsung
  67. ISSCC
    2023
    5.6 A 400 $\times$ 200 600fps 117.7dB-DR SPAD X-Ray Detector with Seamless Global Shutter and Time-Encoded Extrapolation Counter
    DOI
    Byungchoul Park, Byungwook Ahn, Hyun-Seung Choi, Jinwoong Jeong, Kangmin Hwang, Taewoo Kim, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Korean Association Of Science and Technology Studies · Korea Institute of Science and Technology
  68. JSSC
    2023
    A 0.5-ms 47.5-nJ Resistor-to-Digital Converter for Resistive BTEX Sensor Achieving 0.1-to-5 ppb Resolution
    DOI
    Yongtae Lee, Byeonghwa Cho, Changuk Lee, Jongbaeg Kim, Youngcheol Chae
    Yonsei University · Samsung
  69. JSSC
    2023
    A 113.3-dB Dynamic Range 600 Frames/s SPAD X-Ray Detector With Seamless Global Shutter and Time-Encoded Extrapolation Counter
    DOI
    Byungchoul Park, Hyun-Seung Choi, Jinwoong Jeong, Taewoo Kim, Myung-Jae Lee, Youngcheol Chae
    Yonsei University · Korea Institute of Science and Technology
  70. JSSC
    2023
    A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links
    DOI
    Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim
    Samsung · Pohang University of Science and Technology · Yonsei University
  71. JSSC
    2023
    A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS
    DOI
    Woosong Jung, Kwangho Lee, Kwanseo Park, Haram Ju, Jinhyung Lee, Deog-Kyoon Jeong
    Seoul National University · Korea Electronics Technology Institute · Yonsei University · SK hynix
  72. JSSC
    2023
    A 65-dB-SNDR Pipelined SAR ADC Using PVT-Robust Capacitively Degenerated Dynamic Amplifier
    DOI
    Hyunchul Yoon, Changuk Lee, Taewoong Kim, Yigi Kwon, Youngcheol Chae
    Yonsei University · Samsung
  73. JSSC
    2023
    An Energy-Efficient Design of TSV I/O for HBM With a Data Rate up to 10 Gb/s
    DOI
    Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Kiryong Kim, Byoung Mo Moon, Kyomin Sohn, Seong-Ook Jung
    Yonsei University · Samsung
  74. JSSC
    2023
    Dual-Mode Operations of Self-Rectifying Ferroelectric Tunnel Junction Crosspoint Array for High-Density Integration of IoT Devices
    DOI
    Sehee Lim, Youngin Goh, Young Kyu Lee, Dong Han Ko, Junghyeon Hwang, Yeongseok Jeong, Hunbeom Shin, Sanghun Jeon, Seong-Ook Jung
    Yonsei University · Samsung · Korea Advanced Institute of Science and Technology
  75. VLSI
    2023
    A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
    DOI
    MoonHyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E.J. Chichilnisky, Boris Murmann, Dante G. Muratore
    Stanford University · University of Macau · Yonsei University · Delft University of Technology
  76. VLSI
    2023
    A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive Sensing
    DOI
    Yu-Cheng Lin, Chanmin Park, Wenda Zhao, Nan Sun, Youngcheol Chae, Chia-Hsiang Yang
    National Taiwan University · Yonsei University · The University of Texas at Austin · Tsinghua University
  77. VLSI
    2023
    A Highly-Digital PWM-Based Impedance Monitoring IC with 143.2dB DR and 17.7fFrms Resolution
    DOI
    Hyeonho Han, Woojun Choi, Jaehyun Kim, Jaesuk Sung, Heon-Jin Choi, Youngcheol Chae
    Yonsei University · ETH Zurich
  78. VLSI
    2023
    A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC
    DOI
    Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung Mo Moon, Kyomin Sohn, Seong-Ook Jung
    Yonsei University · Samsung
  79. VLSI
    2023
    A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications
    DOI
    Sekeon Kim, Keonhee Cho, Kyeongrim Baek, Hyunjun Kim, Younmee Bae, Mijung Kim, Dongwook Seo, Sangyeop Baeck, Sungjae Lee, Seong-Ook Jung
    Yonsei University · Samsung
  80. A-SSCC
    2022
    A 103.8-dB DR 25ps-to-35ns Resolution Time-to-Digital Converter with Dynamic Ring Oscillator for LiDAR Applications
    DOI
    Taewoong Kim, Sanghoon Lee, Youngcheol Chae
    Yonsei University · Samsung
  81. A-SSCC
    2022
    A 6-bit 5.12-GS/s Flash ADC with Track-and-Hold Embedded Dynamic Preamplifier in 28nm CMOS
    DOI
    Daesik Moon, Sangwoo Lee, Taewoong Kim, Woo-Young Choi, Youngcheol Chae
    Yonsei University · Samsung · Bosch
  82. ESSERC
    2022
    A Highly Integrated Crosspoint Array Using Self-rectifying FTJ for Dual-mode Operations: CAM and PUF
    DOI
    Sehee Lim, Youngin Goh, Young Kyu Lee, Dong Han Ko, Junghyeon Hwang, Minki Kim, Yeongseok Jeong, Hunbeom Shin, Sanghun Jeon, Seong-Ook Jung
    Yonsei University · Korea Advanced Institute of Science and Technology
  83. ESSERC
    2022
    SIF-NPU: A 28nm 3.48 TOPS/W 0.25 TOPS/mm2 CNN Accelerator with Spatially Independent Fusion for Real-Time UHD Super-Resolution
    DOI
    Sumin Lee, Ki-Beom Lee, Sunghwan Joo, Hong Keun Ahn, Junghyup Lee, Dohyung Kim, Bumsub Ham, Seong-Ook Jung
    Yonsei University · Samsung
  84. ISSCC
    2022
    A Fully Digital Time-Mode CMOS Image Sensor with 22.9pJ/frame.pixel and 92dB Dynamic Range
    DOI
    Sangwoo Kim, Taehyoung Kim, Kiwon Seo, Gunhee Han
    Yonsei University
  85. ISSCC
    2022
    A Miniaturized Wireless Neural Implant with Body-Coupled Data Transmission and Power Delivery for Freely Behaving Animals
    DOI
    Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong-Hyun Ahn, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University · Incheon National University
  86. JSSC
    2022
    A 0.033-mm2 21.5-aF to 114.9-aF Resolution Continuous-Time Δ Σ Capacitance-to-Digital Converter Achieving Parasitic Capacitance Immunity Up to 480 pF
    DOI
    Hyeyeon Lee, Changuk Lee, Inhee Lee, Youngcheol Chae
    Yonsei University · University of Pittsburgh
  87. JSSC
    2022
    A 0.9-V 28-MHz Highly Digital CMOS Dual-RC Frequency Reference With ±200 ppm Inaccuracy From −40 °C to 85 °C
    DOI
    Woojun Choi, Jan Angevare, Injun Park, Kofi A. A. Makinwa, Youngcheol Chae
    ETH Zurich · Delft University of Technology · Samsung · Yonsei University
  88. JSSC
    2022
    A 5 Gb/s Time-Interleaved Voltage-Mode Duobinary Encoding Scheme for 3-D-Stacked IC
    DOI
    Ji-Young Kim, Jongsoo Lee, Kiryong Kim, Sunghwan Joo, Byoung Mo Moon, Kyomin Sohn, Seong-Ook Jung
    Yonsei University · Samsung
  89. JSSC
    2022
    A Miniaturized Wireless Neural Implant With Body-Coupled Power Delivery and Data Transmission
    DOI
    Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong-Hyun Ahn, Joonsung Bae, Youngcheol Chae
    Yonsei University · Kangwon National University · Incheon National University · ETH Zurich
  90. JSSC
    2022
    An IR-UWB CMOS Transceiver With Extended Pulse Position Modulation
    DOI
    Geunhaeng Lee, Junyoung Jang, Ji-Hoon Kim, Tae Wook Kim
    Yonsei University · Samsung · Ewha Womans University
  91. JSSC
    2022
    Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector
    DOI
    Haram Ju, Kwangho Lee, Kwanseo Park, Woosong Jung, Deog-Kyoon Jeong
    Korea Electronics Technology Institute · SK hynix · Yonsei University · Seoul National University
  92. JSSC
    2022
    SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased With Technology Scaling
    DOI
    Keonhee Cho, Heekyung Choi, In Jun Jung, Jisang Oh, Tae Woo Oh, Kiryong Kim, Giseok Kim, Taemin Choi, Changsu Sim, Taejoong Song, Seong-Ook Jung
    Yonsei University · Samsung
  93. VLSI
    2022
    A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications
    DOI
    Keonhee Cho, Giseok Kim, Jisang Oh, Kiryong Kim, Changsu Sim, Younmee Bae, Mijung Kim, Sangyeop Baeck, Taejoong Song, Seong-Ook Jung
    Yonsei University · Samsung
  94. VLSI
    2022
    A 50 MS/s 65 dB-SNDR Pipelined SAR ADC using Capacitively Degenerated Two-Stage Dynamic Amplifier
    DOI
    Hyunchul Yoon, Teawoong Kim, Yigi Kwon, Youngcheol Chae
    Yonsei University · Samsung
  95. VLSI
    2022
    A Low Power TSV I/O with Data Rate up to 10 Gb/s for Next Generation HBM
    DOI
    Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Kiryong Kim, Byoung Mo Moon, Kyomin Sohn, Seong-Ook Jung
    Yonsei University · Samsung